Datasheet

AD5680
Rev. A | Page 3 of 20
SPECIFICATIONS
V
DD
= 4.5 V to 5.5 V; R
L
= 2 kΩ to GND; C
L
= 200 pF to GND; V
REF
= V
DD
; all specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
B Grade
1
Parameter Min Typ Max Unit Conditions/Comments
STATIC PERFORMANCE
2
Resolution 18 Bits
Relative Accuracy ±32 ±64 LSB
Differential Nonlinearity
3
±1 LSB Measured in 50 Hz system bandwidth
±2 LSB Measured in 300 Hz system bandwidth
Zero-Code Error 2 10 mV All 0s loaded to DAC register
Full-Scale Error −0.2 −1 % FSR All 1s loaded to DAC register
Offset Error ±10 mV
Gain Error ±1.5 % FSR
Zero-Code Error Drift ±2 µV/°C
Gain Temperature Coefficient ±2.5 ppm Of FSR/°C
DC Power Supply Rejection Ratio −100 dB DAC code = midscale; V
DD
= 5 V ± 10%
OUTPUT CHARACTERISTICS
3
Output Voltage Range 0 V
DD
V
Output Voltage Settling Time 80 85 µs
¼ to ¾ scale change settling to ±8 LSB,
R
L
= 2 kΩ; 0 pF < C
L
< 200 pF
Slew Rate 1.5 V/µs ¼ to ¾ scale
Capacitive Load Stability 2 nF R
L
= ∞
10 nF R
L
= 2 kΩ
Output Noise Spectral Density
4
80 nV/√Hz DAC code = midscale, 10 kHz
Output Noise (0.1 Hz to 10 Hz)
4
25 µV p-p DAC code = midscale
Total Harmonic Distortion (THD)
4
−80 dB V
REF
= 2 V ± 300 mV p-p, f = 200 Hz
Digital-to-Analog Glitch Impulse 5 nV-s 1 LSB change around major carry
Digital Feedthrough 0.2 nV-s
DC Output Impedance 0.5 Ω
Short-Circuit Current
4
30 mA V
DD
= 5 V
REFERENCE INPUT
Reference Current 40 75 µA V
REF
= V
DD
= 5 V
Reference Input Range
5
0.75 V
DD
V
Reference Input Impedance 125 kΩ
LOGIC INPUTS
Input Current ±2 µA All digital inputs
V
INL
, Input Low Voltage 0.8 V V
DD
= 5 V
V
INH
, Input High Voltage 2 V V
DD
= 5 V
Pin Capacitance 3 pF
POWER REQUIREMENTS
V
DD
4.5 5.5 V All digital inputs at 0 V or V
DD
I
DD
(Normal Mode) DAC active and excluding load current
V
DD
= 4.5 V to 5.5 V 325 450 A V
IH
= V
DD
and V
IL
= GND
POWER EFFICIENCY
I
OUT
/I
DD
85 % I
LOAD
= 2 mA, V
DD
= 5 V
1
Temperature range for B version is −40°C to +105°C, typical at +25°C.
2
DC specifications tested with the outputs unloaded, unless otherwise stated. Linearity calculated using a reduced code range of 2048 to 260,096.
3
Guaranteed by design and characterization; not production tested.
4
Output unloaded.
5
Reference input range at ambient where maximum DNL specification is achievable.