Datasheet

AD5666
Rev. D | Page 15 of 28
V
LOGIC
(V)
I
DD
(mA)
4.0
0
0.5
2.5
3.0
3.5
1.0
1.5
2.0
0123456
05298-017
V
DD
=5V
V
DD
=3V
T
A
= 25°C
Figure 24. Supply Current vs. Logic Input Voltage
05298-018
TIME BASE = 4μs/DIV
V
DD
=V
REF
=5V
T
A
=25°C
FULL-SCALE CODE CHANGE
0x0000 TO 0xFFFF
OUTPUT LOADED WITH 2kΩ
AND 200pF TO GND
V
OUT
= 909mV/DIV
1
Figure 25. Full-Scale Settling Time
05298-020
CH1 2.0V CH2 500mV M100μs 125MS/s
A CH1 1.28V
8.0ns/pt
V
DD
=V
REF
=5V
T
A
=25°C
V
OUT
V
DD
1
2
MAX(C2)*
420.0mV
Figure 26. Power-On Reset to 0 V
05298-033
CH1 2.0V CH2 1.0V M100μs 125MS/s
A CH1 1.28V
8.0ns/pt
V
DD
=V
REF
=5V
T
A
=25°C
V
OUT
V
DD
1
2
Figure 27. Power-On Reset to Midscale
05298-034
V
DD
= 5V
SYNC
SLCK
V
OUT
1
3
CH1 5.0V
CH3 5.0V
CH2 500mV M400ns A CH1 1.4V
2
Figure 28. Exiting Power-Down to Midscale
SAMPLE
V
OUT
(V)
2.505
2.485
0 512
05298-022
64 128 192 256 320 384 448
V
DD
=5V
V
REFOUT
=2.5V
T
A
= 25°C
4ns/SAMPLE NUMBER
GLITCH IMPULSE = 3.55nV-s
1 LSB CHANGE AROUND
MIDSCALE (0x8000 TO 0x7FFF)
2.486
2.487
2.488
2.489
2.490
2.491
2.492
2.493
2.494
2.495
2.496
2.497
2.498
2.499
2.500
2.501
2.502
2.503
2.504
Figure 29. Digital-to-Analog Glitch Impulse