Datasheet

AD5625R/AD5645R/AD5665R, AD5625/AD5665 Data Sheet
Rev. C | Page 28 of 36
BROADCAST MODE
Broadcast addressing is supported on the AD56x5R/AD56x5
in write mode only. Broadcast addressing can be used to synchro-
nously update or power down multiple AD56x5R/AD56x5
devices. When the broadcast address is used, the AD56x5R/
AD56x5 respond regardless of the states of the address pins.
The AD56x5R/AD56x5 broadcast address is 00010000.
Table 11. Command Definition
C2
C1
C0
Command
0 0 0 Write to input Register n
0 0 1 Update DAC Register n
0 1 0 Write to input Register n, update all
(software
LDAC
)
0 1 1 Write to and update DAC Channel n
1 0 0 Power up/power down
1 0 1 Reset
1 1 0
LDAC
register setup
1 1 1 Internal reference setup (on/off )
Table 12. DAC Address Command
A2 A1 A0 ADDRESS (n)
0 0 0 DAC A
0 0 1 DAC B
0 1 0 DAC C
0
1
1
DAC D
1 1 1 All DACs
LDAC
FUNCTION
The AD56x5R/AD56x5 DACs have double-buffered interfaces
consisting of two banks of registers: input registers and DAC
registers. The input registers are connected directly to the input
shift register, and the digital code is transferred to the relevant
input register upon completion of a valid write sequence. The
DAC registers contain the digital code used by the resistor strings.
Access to the DAC registers is controlled by the
LDAC
pin.
When the
LDAC
pin is high, the DAC registers are latched
and the input registers can change state without affecting the
contents of the DAC registers. When
LDAC
is brought low,
however, the DAC registers become transparent and the contents of
the input registers are transferred to them. The double-buffered
interface is useful if the user requires simultaneous updating of
all DAC outputs. The user can write to one of the input registers
individually and then, by bringing
LDAC
low when writing to
the other DAC input register, all outputs update simultaneously.
These parts each contain an extra feature whereby a DAC register
is not updated unless its input register has been updated since
the last time
LDAC
was brought low. Normally, when
LDAC
is
brought low, the DAC registers are filled with the contents of the
input registers. In the case of the AD56x5R/AD56x5, the DAC
register updates only if the input register has changed since the
last time the DAC register was updated, thereby removing
unnecessary digital crosstalk.
The outputs of all DACs can be simultaneously updated, using
the hardware
LDAC
pin.
.