Datasheet

Data Sheet AD5625R/AD5645R/AD5665R, AD5625/AD5665
Rev. C | Page 27 of 36
Figure 63. Multiple Block Write with Command Byte in Each Block (S = 0)
Figure 64. Multiple Block Write with Initial Command Byte Only (S = 1)
Figure 65. AD5665R/AD5665 Input Shift Register (16-Bit DAC)
Figure 66. AD5645R Input Shift Register (14-Bit DAC)
Figure 67. AD5625R/AD5625 Input Shift Register (12-Bit DAC)
SLAVE
ADDRESS
COMMAND
BYTE
MOST SIGNIFICANT
DATA BYTE
COMMAND
BYTE
LEAST SIGNIFICANT
DATA BYTE
MOST SIGNIFICANT
DATA BYTE
LEAST SIGNIFICANT
DATA BYTE
S = 0
BLOCK 1
S = 0
BLOCK 2
MOST SIGNIFICANT
DATA BYTE
COMMAND
BYTE
LEAST SIGNIFICANT
DATA BYTE
STOP
S = 0
BLOCK n
06341-107
SLAVE
ADDRESS
COMMAND
BYTE
MOST SIGNIFICANT
DATA BYTE
MOST SIGNIFICANT
DATA BYTE
LEAST SIGNIFICANT
DATA BYTE
LEAST SIGNIFICANT
DATA BYTE
S = 1
BLOCK 1
S = 1
BLOCK 2
MOST SIGNIFICANT
DATA BYTE
LEAST SIGNIFICANT
DATA BYTE
STOP
S = 1
BLOCK n
06341-106
DB23 DB22 DB21 DB20 DB19 DB18
DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2
DB1 DB0
R
S
RESERVED
BYTE
SELECTION
C2 C1 C0 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6
D5
D4 D3 D2 D1 D0
COMMAND
DAC ADDRESS DAC DATA DAC DATA
COMMAND BYTE DATA HIGH BYTE DATA LOW BYTE
06341-108
DB23 DB22 DB21 DB20 DB19
DB18 DB17 DB16 DB15 DB14 DB13 DB12
DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3
DB2 DB1 DB0
R S
RESERVED
BYTE
SELECTION
C2 C1
C0 A2
A1 A0 D13 D12 D11 D10 D9 D8
D7 D6 D5 D4 D3 D2 D1 D0
X X
COMMAND DAC ADDRESS DAC DATA DAC DATA
COMMAND BYTE DATA HIGH BYTE DATA LOW BYTE
06341-109
DB23
DB22 DB21
DB20 DB19
DB18 DB17 DB16
DB15
DB14 DB13
DB12 DB11
DB10 DB9
DB8 DB7
DB6 DB5
DB4
DB3 DB2
DB1 DB0
R
S
RESERVED
BYTE
SELECTION
C2 C1
C0 A2 A1
A0 D11
D10
D9 D8
D7 D6
D5 D4 D3
D2 D1
D0
X X
X X
COMMAND DAC ADDRESS
DAC DATA DAC DATA
COMMAND BYTE
DATA HIGH BYTE DATA LOW BYTE
06341-110