Datasheet

Data Sheet AD5625R/AD5645R/AD5665R, AD5625/AD5665
Rev. C | Page 23 of 36
THEORY OF OPERATION
DIGITAL-TO-ANALOG CONVERTER (DAC)
The AD56x5R/AD56x5 DACs are fabricated on a CMOS
process. The AD56x5 does not have an internal reference, and
the DAC architecture is shown in Figure 55. The AD56x5R does
have an internal reference and can be configured for use with
either an internal or external reference (see Figure 55 and
Figure 56).
Because the input coding to the DAC is straight binary, the ideal
output voltage when using an external reference is given by







N
REFIN
OUT
D
VV
2
Figure 55. Internal Configuration When Using an External Reference
The ideal output voltage when using the internal reference is
given by







N
REFOUTOUT
D
VV
2
2
where:
D is the decimal equivalent of the binary code that is loaded to
the DAC register, as follows:
0 to 4095 for AD5625R/AD5625 (12-bit).
0 to 16,383 for AD5645R (14-bit).
0 to 65,535 for AD5665R/AD5665 (16-bit).
N is the DAC resolution.
Figure 56. Internal Configuration When Using the Internal Reference
RESISTOR STRING
The resistor string is shown in Figure 57. It is simply a string of
resistors, each of value R. The code loaded to the DAC register
determines at which node on the string the voltage is tapped off
to be fed into the output amplifier. The voltage is tapped off by
closing one of the switches connecting the string to the amplifier.
Because it is a string of resistors, it is guaranteed monotonic.
OUTPUT AMPLIFIER
The output buffer amplifier can generate rail-to-rail voltages on its
output, which gives an output range of 0 V to V
DD
. It can drive a
load of 2 kΩ in parallel with 1000 pF to GND. The source and
sink capabilities of the output amplifier are shown in Figure 39
and Figure 40. The slew rate is 1.8 V/μs with a ¼ to ¾ full-scale
settling time of 7 μs.
Figure 57. Resistor String
INTERNAL REFERENCE
The AD5625R/AD5645R/AD5665R feature an on-chip reference.
Versions without the R suffix require an external reference. The
on-chip reference is off at power-up and is enabled via a write to a
control register. See the Internal Reference Setup section for details.
Versions packaged in a 10-lead LFCSP have a 1.25 V reference
or a 2.5 V reference, giving a full-scale output of 2.5 V or 5 V,
depending on the model selected (see the Ordering Guide). The
WLCSP package has an internal reference of 1.25 V. These parts
can be operated with a V
DD
supply of 2.7 V to 5.5 V. Versions
packaged in a 14-lead TSSOP have a 2.5 V reference, giving a
full-scale output of 5 V. Parts are functional with a V
DD
supply
of 2.7 V to 5.5 V, but with a V
DD
supply of less than 5 V, the
output is clamped to V
DD
. See the Ordering Guide for a full list
of models. The internal reference associated with each part is
available at the V
REFOUT
pin (available on R suffix versions only).
A buffer is required if the reference output is used to drive
external loads. When using the internal reference, it is recom-
mended that a 100 nF capacitor be placed between the reference
output and GND for reference stability.
REF
BUFFER
OUTPUT
AMPLIFIER
GAIN = ×2
DAC
REGISTER
V
REFIN
/V
REFOUT
V
OUT
06341-034 GND
REF (+)
REF (–)
RESISTOR
STRING
OUTPUT
AMPLIFIER
GAIN = ×2
DAC
REGISTER
REF (+)
V
REFIN
/V
REFOUT
V
OUT
REF (–)
RESISTOR
STRING
GND
06341-035
1.25V INTERNAL
REFERENCE
1
1
CAN BE OVERDRIVEN
BY V
REFIN
/V
REFOUT
.
R
R
R
R
R
TO OUTPUT
AMPLIFIER
0
6341-033