Datasheet

Data Sheet AD5641
Rev. D | Page 11 of 20
CH1 5V, CH2 1V, TIME BASE = 2µs/DIV
CH1
CH2
04611-028
V
DD
= 5V
T
A
= 25°C
V
OUT
Figure 29. Exiting Power-Down Mode
0
20
40
60
80
100
120
140
0 5 10 15 20 25
FREQUENCY (MHz)
I
DD
(A)
04611-029
3/4 SCALE
FULL SCALE
1/4 SCALE
MIDSCALE
ZERO SCALE
Figure 30. I
DD
vs. SCLK vs. Code
04611-030
0
100
200
300
400
500
600
700
100 1000 10000 100000
FREQUENCY (Hz)
OUTPUT NOISE SPECTRAL DENSITY (nV/ Hz)
FULL SCALE
ZERO SCALE
V
DD
= 5V
T
A
= 25°C
UNLOADED OUTPUT
MIDSCALE
Figure 31. Noise Spectral Density
0
50
100
150
200
250
300
350
400
450
0
V
LOGIC
(V)
I
DD
(A)
SCLK/SDIN
INCREASING
V
DD
= 3V
SCLK/SDIN DECREASING V
DD
= 3V
SCLK/SDIN
DECREASING
V
DD
= 5V
SCLK/SDIN
INCREASING
V
DD
= 5V
645321
T
A
= 25°C
04611-044
Figure 32. SCLK/SDIN vs. Logic Voltage