Datasheet

AD5627R/AD5647R/AD5667R, AD5627/AD5667
Rev. 0 | Page 20 of 32
THEORY OF OPERATION
D/A SECTION
The AD56x7R/AD56x7 DACs are fabricated on a CMOS
process. The architecture consists of a string DAC followed by
an output buffer amplifier.
Figure 52 shows a block diagram of
the DAC architecture.
DAC
REGISTER
RESISTOR
STRING
REF (+)
V
DD
GND
REF (–)
V
OUT
OUTPUT
AMPLIFIER
GAIN = +2
06342-032
Figure 52. DAC Architecture
Because the input coding to the DAC is straight binary, the ideal
output voltage when using an external reference is given by
⎟
⎠
⎞
⎜
⎝
⎛
×=
N
REFIN
OUT
D
VV
2
The ideal output voltage when using the internal reference is
given by
⎟
⎠
⎞
⎜
⎝
⎛
××=
N
REFOUTOUT
D
VV
2
2
where:
D is the decimal equivalent of the binary code that is loaded to
the DAC register:
0 to 4095 for AD5627R/AD5627 (12-bit).
0 to 16,383 for AD5647R (14-bit).
0 to 65,535 for AD5667R/AD5667 (16-bit).
N is the DAC resolution.
RESISTOR STRING
The resistor string is shown in Figure 53. It is simply a string of
resistors, each of value R. The code loaded to the DAC register
determines at which node on the string the voltage is tapped off
to be fed into the output amplifier. The voltage is tapped off by
closing one of the switches connecting the string to the amplifier.
Because it is a string of resistors, it is guaranteed monotonic.
OUTPUT AMPLIFIER
The output buffer amplifier can generate rail-to-rail voltages on
its output, which gives an output range of 0 V to V
DD
. It can drive
a load of 2 k in parallel with 1000 pF to GND. The source and
sink capabilities of the output amplifier can be seen in
Figure 33
and
Figure 34. The slew rate is 1.8 V/µs with a ¼ to ¾ full-scale
settling time of 7 µs.
R
R
R
R
R
TO OUTPUT
AMPLIFIER
0
6342-033
Figure 53. Resistor String
INTERNAL REFERENCE
The AD5627R/AD5647R/AD5667R feature an on-chip
reference. Versions without the R suffix require an external
reference. The on-chip reference is off at power-up and is
enabled via a write to a control register. See the
Internal
Reference Setup
section for details.
Versions packaged in a 10-lead LFCSP package have a 1.25 V
reference, giving a full-scale output of 2.5 V. These parts can be
operated with a V
DD
supply of 2.7 V to 5.5 V. Versions packaged
in a 10-lead MSOP package have a 2.5 V reference, giving a full-
scale output of 5 V. The parts are functional with a V
DD
supply
of 2.7 V to 5.5 V, but with a V
DD
supply of less than 5 V, the
output is clamped to V
DD
. See the Ordering Guide for a full list
of models. The internal reference associated with each part is
available at the V
REFOUT
pin.
A buffer is required if the reference output is used to drive
external loads. When using the internal reference, it is
recommended that a 100 nF capacitor be placed between the
reference output and GND for reference stability.
EXTERNAL REFERENCE
The AD5627/AD5667 require an external reference, which is
applied at the V
REFIN
pin. The V
REFIN
pin on the AD56x7R allows
the use of an external reference if the application requires it.
The default condition of the on-chip reference is off at power-
up. All devices can be operated from a single 2.7 V to 5.5 V supply.