Datasheet

AD5626
Rev. A | Page 8 of 20
5.0
4.0
0.01 10
06757-011
OUTPUT LOAD CURRENT (mA)
V
DD
MIN (V)
0.1 1
4.8
4.6
4.4
4.2
V
FS
 1 LSB
DATA = 0xFFF
T
A
= 25°C
PROPER OPERATION
WHEN V
DD
SUPPLY
VOLTAGE IS ABOVE
CURVE
Figure 11. Minimum Supply Voltage vs. Load
06757-012
TIME (ns)
V
OUT
(V)
2.07
2.06
2.05
2.04
2.11
2.10
2.09
2.08
2.03
4.00 0.5 1.0 1.5 2.0 2.5 3.53.0
0x7FF 0x800
0x800 0x7FF
Figure 12. Midscale DAC Glitch Performance
06757-013
OUTPUT
CH2
SOURCE
2.90V
OFFSET
1.00V/DIV
VERTICLE SCALE
105.758µs
POSITION
50.0µs/DIV
HORIZONTAL SCALE
2
Figure 13. Large Signal Settling Time
06757-014
OUTPUT
CH1
CH2
SOURCE
–1.95V
3.9875mV
OFFSET
2.00V/DIV
200mV/DIV
VERTICLE SCALE
22.725µs
22.725µs
POSITION
5.0µs/DIV
5.0µs/DIV
HORIZONTAL SCALE
1
2
LDAC
Figure 14. Rise Time Detail
CH1
CH2
SOURCE
–1.95V
87.6mV
OFFSET
2.00V/DIV
200mV/DIV
VERTICLE SCALE
22.725µs
22.725µs
POSITION
5.0µs/DIV
5.0µs/DIV
HORIZONTAL SCALE
06757-015
OUTPUT
1
2
LDAC
Figure 15. Fall Time Detail
0.20
–0.15
0 4000
06757-016
CODE
INL (LSB)
0.15
0.10
0.05
0
–0.05
–0.10
500 1000 1500 2000 2500 3000 3500
V
DD
= 5V
+25°C
–40°C
+85°C
Figure 16. Integral Linearity Error vs. Digital Code