Datasheet

AD5626
Rev. A | Page 4 of 20
TIMING CHARACTERISTICS
@ V
DD
= 5.0 V ± 5%, −40°C ≤ T
A
≤ +85°C, unless otherwise noted.
Table 2.
Parameter
1, 2
Limit at T
MIN
, T
MAX
Unit Description
t
CH
30 ns min Clock width high
t
CL
30 ns min Clock width low
t
LDW
20 ns min Load pulse width
t
DS
15 ns min Data setup
t
DH
15 ns min Data hold
t
CLRW
30 ns min Clear pulse width
t
LD1
15 ns min Load setup
t
LD2
10 ns min Load hold
t
CSS
30 ns min Select
t
CSH
20 ns min Deselect
1
These parameters are guaranteed by design and not subject to production testing.
2
All input control signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
Timing Diagram
06757-002
SDIN
D11 D10 D9 D8 D7 D6 D5 D4
±1 LSB
ERROR BAND
D3 D2 D1 DO
t
CSH
t
LD2
SCLK
CS
LDAC
t
LD1
t
CL
t
DS
t
CH
t
DH
t
S
t
S
t
CLRW
t
LDW
t
CSS
SDIN
SCLK
LDAC
CLR
FS
V
OUT
ZS
Figure 2. Timing Diagram