Datasheet

Data Sheet AD5602/AD5612/AD5622
Rev. C | Page 3 of 24
SPECIFICATIONS
V
DD
= 2.7 V to 5.5 V, R
L
= 2 kto GND, C
L
= 200 pF to GND; all specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
A, B, W, Y Versions
1
Parameter Min Typ Max Unit Test Conditions/Comments
STATIC PERFORMANCE DAC output unloaded
Resolution Bits
AD5602 8
AD5612 10
AD5622 12
Relative Accuracy
2
AD5602 ±0.5 LSB B, Y versions
AD5612 ±0.5 LSB B, Y versions
±4 LSB A version
AD5622
±2
LSB
B, Y versions
±6
LSB
A, W versions
Differential Nonlinearity
2
±1 LSB Guaranteed monotonic by design
Zero Code Error 0.5 10 mV All 0s loaded to DAC register
Offset Error ±0.063 ±10 mV
Full-Scale Error 0.5 mV All 1s loaded to DAC register
Gain Error ±0.0004 ±0.037 % of FSR
Zero Code Error Drift 5 µV/°C
Gain Temperature Coefficient 2 ppm of FSR/°C
OUTPUT CHARACTERISTICS
3
Output Voltage Range 0 V
DD
V
Output Voltage Settling Time 6 10 µs Code ¼ to ¾
Slew Rate 0.5 V/µs
Capacitive Load Stability 470 pF R
L
= ∞
pF
R
L
= 2 kΩ
Output Noise Spectral Density
nV/Hz
DAC code = midscale, 10 kHz
Noise 2 DAC code = midscale, 0.1 Hz to 10 Hz
bandwidth
Digital-to-Analog Glitch Impulse 5 nV-s 1 LSB change around major carry
Digital Feedthrough 0.2 nV-s
DC Output Impedance 0.5
Short Circuit Current 15 mA V
DD
= 3 V/5 V
LOGIC INPUTS (SDA, SCL)
I
IN
, Input Current
±1
µA
V
INL
, Input Low Voltage 0.3 × V
DD
V
V
INH
, Input High Voltage 0.7 × V
DD
V
C
IN
, Pin Capacitance 2 pF
V
HYST
, Input Hysteresis 0.1 × V
DD
V
LOGIC OUTPUTS (OPEN DRAIN)
V
OL
, Output Low Voltage 0.4 V I
SINK
= 3 mA
0.6 V I
SINK
= 6 mA
Floating-State Leakage Current ±1 µA
Floating-State Output Capacitance
pF