Datasheet

Data Sheet AD5543/AD5553
Rev. F | Page 3 of 20
SPECIFICATIONS
V
DD
= 5 V ± 10%, V
SS
= 0 V, I
OUT
= virtual GND, GND = 0 V, V
REF
= 10 V, T
A
= full operating temperature range, unless otherwise noted.
Table 1.
Parameter Symbol Condition 5 V ± 10% Unit
STATIC PERFORMANCE
1
Resolution
N
1 LSB = V
REF
/2
16
= 153 µV when V
REF
= 10 V (AD5543)
16
Bits
1 LSB = V
REF
/2
14
= 610 µV when V
REF
= 10 V (AD5553) 14 Bits
Relative Accuracy INL Grade: AD5553C ±1 LSB max
Grade: AD5543C ±1 LSB max
Grade: AD5543B ±2 LSB max
Differential Nonlinearity
DNL
Monotonic
±1
LSB max
Output Leakage Current I
OUT
Data = 0x0000, T
A
= 25°C 10 nA max
Data = 0x0000, T
A
= T
A
maximum 20 nA max
Full-Scale Gain Error G
FSE
Data = 0xFFFF ±1/±4 mV typ/max
Full-Scale Temperature Coefficient
2
TCV
FS
1 ppm/°C typ
REFERENCE INPUT
V
REF
Range V
REF
−15/+15 V min/max
Input Resistance R
REF
5 kΩ typ
3
Input Capacitance
2
C
REF
5 pF typ
ANALOG OUTPUT
Output Current I
OUT
Data = 0xFFFF for AD5543 2 mA typ
Data = 0x3FFF for AD5553
Output Capacitance
2
C
OUT
Code dependent 200 pF typ
LOGIC INPUTS AND OUTPUT
Logic Input Low Voltage
V
IL
0.8
V max
Logic Input High Voltage V
IH
2.4 V min
Input Leakage Current I
IL
10 µA max
Input Capacitance
2
C
IL
10 pF max
INTERFACE TIMING
2, 4
See Figure 4 and Figure 5
Clock Input Frequency f
CLK
50 MHz
Clock Width High t
CH
10 ns min
Clock Width Low t
CL
10 ns min
CS to Clock Setup
t
CSS
0 ns min
Clock to CS Hold
t
CSH
10 ns min
Data Setup t
DS
5 ns min
Data Hold t
DH
10 ns min
SUPPLY CHARACTERISTICS
Power Supply Range V
DD RANGE
4.5/5.5 V min/max
Positive Supply Current I
DD
Logic inputs = 0 V 10 µA max
Power Dissipation P
DISS
Logic inputs = 0 V 0.055 mW max
Power Supply Sensitivity P
SS
ΔV
DD
= ±5% 0.006 %/% max