Datasheet

Data Sheet AD5547/AD5557
Rev. D | Page 7 of 20
Pin No. Mnemonic Function
19 A0 Address Pin 0. Signal level must be ≤V
DD
+ 0.3 V.
20 A1 Address Pin 1. Signal level must be ≤V
DD
+ 0.3 V.
21 LDAC Digital Input Load DAC Control. Signal level must be ≤V
DD
+ 0.3 V.
22 MSB Power-On Reset State. MSB = 0 corresponds to zero-scale reset; MSB = 1 corresponds to midscale reset. The
signal level must be ≤V
DD
+ 0.3 V.
23
RS
Active low resets both input and DAC registers. Resets to zero-scale if MSB = 0 and resets to midscale if MSB = 1.
Signal level must be ≤V
DD
+ 0.3 V.
29 VDD Positive Power Supply Input. The specified range of operation is 2.7 V to 5.5 V.