Datasheet

AD5547/AD5557 Data Sheet
Rev. D | Page 4 of 20
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
SUPPLY CHARACTERISTICS
Power Supply Range V
DD RANGE
2.7 5.5 V
Positive Supply Current I
DD
Logic inputs = 0 V 10 μA
Power Dissipation P
DISS
Logic inputs = 0 V 0.055 mW
Power Supply Sensitivity
P
SS
∆V
DD
= ±5% 0.003 %/%
AC CHARACTERISTICS
4
Output Voltage Settling Time t
S
To ±0.1% of full scale, data cycles from zero scale
to full scale to zero scale
0.5 μs
Reference Multiplying BW BW V
REF
= 100 mV rms, data = full scale 6.8 MHz
DAC Glitch Impulse Q V
REF
= 0 V, midscale – 1 to midscale −3.5 nV-s
Multiplying Feedthrough Error V
OUT
/V
REF
V
REF
= 100 mV rms, f = 10 kHz −78 dB
Digital Feedthrough Q
D
WR
= 1, LDAC toggles at 1 MHz
7 nV-s
Total Harmonic Distortion THD V
REF
= 5 V p-p, data = full scale, f = 1 kHz −104 dB
Output Noise Density e
N
f = 1 kHz, BW = 1 Hz 12 nV/√Hz
Analog Crosstalk C
AT
Signal input at Channel A and measures the
output at Channel B, f = 1 kHz
−95 dB
1
All static performance tests (except I
OUT
) are performed in a closed-loop system using an external precision OP97 I-to-V converter amplifier. The device R
FB
terminal is
tied to the amplifier output. The +IN pin of the OP97 is grounded, and the I
OUT
of the DAC is tied to the OP97’s −IN pin. Typical values represent average readings
measured at 25°C.
2
Guaranteed by design; not subject to production testing.
3
All input control signals are specified with t
R
= t
F
= 2.5 ns (10% to 90% of 3 V) and are timed from a voltage level of 1.5 V.
4
All ac characteristic tests are performed in a closed-loop system using an AD8038 I-to-V converter amplifier except for THD where the AD8065 was used.
Timing Diagram
04452-018
t
WR
t
DS
t
DH
t
LWD
t
LDAC
t
RS
WR
DATA
LDAC
RS
Figure 3. AD5547/AD5557 Timing Diagram