Datasheet
AD5546/AD5556 Data Sheet
Rev. D | Page 6 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
03810-003
AD5546
TOP VIEW
(Not to Scale)
D7
1
V
DD
28
D6
2
D8
27
D5
3
D9
26
D4
4
D10
25
D3
5
D11
24
D2
6
D12
23
D1
7
D13
22
D0
8
D14
21
R
OFS
9
D15
20
R
FB
10
GND
19
R1
11
RS
18
R
COM
12
MSB
17
REF
13
WR
16
I
OUT
14
LDAC
15
Figure 4. AD5546 Pin Configuration
03810-004
AD5556
TOP VIEW
(Not to Scale)
NC = NO CONNECT
D5
1
V
DD
28
D4
2
D6
27
D3
3
D7
26
D2
4
D8
25
D1
5
D9
24
D0
6
D10
23
NC
7
D11
22
NC
8
D12
21
R
OFS
9
D13
20
R
FB
10
GND
19
R1
11
RS
18
R
COM
12
MSB
17
REF
13
WR
16
I
OUT
14
LDAC
15
Figure 5. AD5556 Pin Configuration
Table 3. AD5546 Pin Function Descriptions
Pin No. Mnemonic Description
1 to 8 D7 to D0 Digital Input Data Bits[D7: D0]. The signal level must be ≤ V
DD
+ 0.3 V.
9 R
OFS
Bipolar Offset Resistor. Accepts up to ±18 V. In two-quadrant mode, ties to R
FB
. In four-quadrant mode, ties to R1
and the external reference.
10 R
FB
Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion.
11 R1 Four-Quadrant Resistor R1. In two-quadrant mode, shorts to the REF pin. In four-quadrant mode, ties to R
OFS
.
12 R
COM
Center Tap Point of Two Four-Quadrant Resistors, R1 and R2. In four-quadrant mode, ties to the inverting node of
the reference amplifier. In two-quadrant mode, shorts to the REF pin.
13 REF DAC Reference Input in Two-Quadrant Mode and R2 Terminal in Four-Quadrant Mode. In two-quadrant mode, this
pin is the reference input with constant input resistance vs. code. In four-quadrant mode, this pin is driven by the
external reference amplifier.
14 I
OUT
DAC Current Output. Connects to the inverting node of an external op amp for I-V conversion.
15 LDAC Digital Input Load DAC Control. Signal level must be ≤ V
DD
+ 0.3 V.
16
WR
Write Control Digital Input in Active Low. Transfers shift-register data to the DAC register on the rising edge. The
signal level must be ≤ V
DD
+ 0.3 V.
17 MSB Power-On Reset State. MSB = 0 resets at zero scale; MSB = 1 resets at midscale. The signal level must be
≤ V
DD
+ 0.3 V.
18
RS
Reset in Active Low. Resets to zero scale if MSB = 0, and resets to midscale if MSB = 1. The signal level must be
≤ V
DD
+ 0.3 V.
19 GND Analog and Digital Grounds.
20 to 21 D15 to D14 Digital Input Data Bits[D15:D14]. The signal level must be ≤ V
DD
+ 0.3 V.
22 to 27 D13 to D8 Digital Input Data Bits[D13:D8]. The signal level must be ≤ V
DD
+ 0.3 V.
28 V
DD
Positive Power Supply Input. Specified range of operation: 2.7 V to 5.5 V.
Table 4. AD5556 Pin Function Descriptions
Pin No. Mnemonic Description
1 to 6 D5 to D0
Digital Input Data Bits[D5:D0]. The signal level must be ≤ V
DD
+0.3 V.
7 to 8 NC No Connection. The user should not connect anything other than dummy pads on these terminals.
9 R
OFS
Bipolar Offset Resistor. Accepts up to ±18 V. In two-quadrant mode, ties to RFB. In four-quadrant mode, ties to R1
and the external reference.
10 R
FB
Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion.
11 R1 Four-Quadrant Resistor R1. In two-quadrant mode, shorts to the REF pin. In four-quadrant mode, ties to R
OFS
.
12 R
COM
Center Tap Point of Two Four-Quadrant Resistors, R1 and R2. In four-quadrant mode, ties to the inverting node of
the reference amplifier. In two-quadrant mode, shorts to the REF pin.