Datasheet

Data Sheet AD5545/AD5555
Rev. G | Page 9 of 24
THEORY OF OPERATION
The AD5545/AD5555 contain a 16-/14-bit, current-output,
digital-to-analog converter, a serial-input register, and a DAC
register. Both parts require a minimum of a 3-wire serial data
interface with an additional
LDAC
for dual channel simultaneous
update.
DIGITAL-TO-ANALOG CONVERTER
The DAC architecture uses a current-steering R-2R ladder
design. Figure 17 shows the typical equivalent DAC. The DAC
contains a matching feedback resistor for use with an external
I-to-V converter amplifier. The R
FB
pin is connected to the
output of the external amplifier. The I
OUT
terminal is connected
to the inverting input of the external amplifier. These DACs are
designed to operate with either negative or positive reference
voltages. The V
DD
power pin is used only by the logic to drive
the DAC switches on and off. Note that a matching switch is
used in series with the internal 5 kΩ feedback resistor. If users
attempt to measure the R
FB
value, power must be applied to V
DD
to achieve continuity. The V
REF
input voltage and the digital data
(D) loaded into the corresponding DAC register, according to
Equation 1 and Equation 2, determine the DAC output voltage.
536,65/– DVV
REF
OUT
×=
(1)
384,16
/– DVV
REF
OUT
×=
(2)
Note that the output full-scale polarity is the opposite of the
V
REF
polarity for dc reference voltages.
V
REF
DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY:
SWITCHES S1 AND S2 ARE CLOSED, V
DD
MUST BE POWERED
R
2R
2R 2R R 5kΩ
S2 S1
R
R
V
DD
R
FB
I
OUT
GND
02918-0
-005
Figure 17. Equivalent R-2R DAC Circuit
These DACs are also designed to accommodate ac reference input
signals. The AD5545/AD5555 accommodate input reference
voltages in the range of –12 V to +12 V. The reference voltage
inputs exhibit a constant nominal input-resistance value of
5 kΩ, ±30%. The DAC output (I
OUT
) is code dependent, pro-
ducing various output resistances and capacitances. When
choosing an external amplifier, the user should take into
account the variation in impedance generated by the AD5545/
AD5555 on the amplifiers inverting input node. The feedback
resistance in parallel with the DAC ladder resistance dominates
output voltage noise.
V
REF
A
DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY:
SWITCHES S1 AND S2 ARE CLOSED, V
DD
MUST BE POWERED
R
2R 2R 2R R
5kΩ
S2
S1
+3V
–3V
R
R
V
OUT
V
IN
V
DD
5V
2.500V
R
FB
A
I
OUT
A
A
GND
A
GND
02918-0-006
AD5545/AD5555
ADR03
AD8628
LOAD
V
OUT
V
EE
V
CC
Figure 18. Recommended System Connections