Datasheet

AD5532
Rev. D | Page 18 of 20
AD5532 to PIC16C6x/7x
The PIC16C6x/7x synchronous serial port (SSP) is configured
as an SPI master with the Clock Polarity Bit = 0. This is done by
writing to the synchronous serial port control register
(SSPCON). See the
PIC16/17 Microcontroller User Manual. In
this example, the I/O port RA1 is being used to pulse
SYNC
and enable the serial port of the AD5532. This microcontroller
transfers only eight bits of data during each serial transfer
operation; therefore, two or three consecutive read/write
operations are needed depending on the mode.
shows the connection diagram.
Figure 24
00939-C-023
AD5532*
*ADDITIONAL PINS OMITTED FOR CLARITY
PIC16C6x/7x*
SCLK SCK/RC3
D
OUT
SDO/RC5
D
IN
SDI/RC4
RA1SYNC
Figure 24. AD5532 to PIC16C6x/7x Interface
AD5532 to 8051
The AD5532 requires a clock synchronized to the serial data.
The 8051 serial interface must therefore be operated in Mode 0.
In this mode, serial data enters and exits through RxD and a
shift clock is output on TxD. Figure 25 shows how the 8051 is
connected to the AD5532. Because the AD5532 shifts data out
on the rising edge of the shift clock and latches data in on the
falling edge, the shift clock must be inverted. The AD5532
requires its data with the MSB first. Because the 8051 outputs
the LSB first, the transmit routine must take this into account.
00939-C-024
AD5532*
*ADDITIONAL PINS OMITTED FOR CLARITY
8051*
SCLK TxD
D
OUT
RxD
D
IN
P1.1SYNC
Figure 25. AD5532 to 8051 Interface
APPLICATION CIRCUITS
AD5532 in a Typical ATE System
The AD5532 is ideally suited for use in automatic test
equipment. Several DACs are required to control pin drivers,
comparators, active loads, and signal timing. Traditionally,
sample-and-hold devices were used in this application.
The AD5532 has several advantages: no refreshing is required,
there is no droop, pedestal error is eliminated, and there is no
need for extra filtering to remove glitches. Overall a higher level
of integration is achieved in a smaller area (see Figure 26).
00939-C-025
DACs
ACTIVE
LOAD
PARAMETRIC
MEASUREMENT
UNIT
DRIVER
COMPARATOR
COMPARE
REGISTER
STORED
DATA
AND INHIBIT
PATTERN
PERIOD
GENERATION
AND
DELAY
TIMING
FORMATTER
SYSTEM BUS
DAC
SYSTEM BUS
DUT
DAC
DAC
DAC
DAC
DAC
DAC
Figure 26. AD5532 in an ATE System
Typical Application Circuit (DAC Mode)
The AD5532 can be used in many optical networking
applications that require a large number of DACs to perform
control and measurement functions. In the example shown in
Figure 27, the outputs of the AD5532 are amplified and used to
control actuators that determine the position of MEMS mirrors
in an optical switch. The exact position of each mirror is
measured using sensors. The sensor readings are muxed using
four dual, 4-channel matrix switches (ADG739) and fed back to
an 8-channel, 14-bit ADC (AD7856).
The control loop is driven by an ADSP-2191M, a 16-bit fixed-
point DSP with 3 SPORT interfaces and 2 SPI ports. The DSP
uses some of these serial ports to write data to the DAC, control
the multiplexer, and read back data from the ADC.
00939-C-026
ADSP-2191M
AD5532
ADG739
×4
AD8544
×2
AD7856
1
32
1
32
1
8
MEMS
MIRROR
ARRAY
S
E
N
S
O
R
Figure 27. Typical Optical Control and Measurement Application Circuit