Datasheet

AD5444/AD5446 Data Sheet
Rev. E | Page 16 of 28
Bipolar Operation
In some applications, it may be necessary to generate a full
4-quadrant multiplying operation, or a bipolar output swing.
This can easily be accomplished by using another external
amplifier and some external resistors, as shown in Figure 39.
In this circuit, the second amplifier (A2) provides a gain of 2.
Biasing the external amplifier with an offset from the reference
voltage results in a full 4-quadrant multiplying operation. The
transfer function of this circuit shows that both negative and
positive output voltages are created as the input data (D) is
incremented from code zero (V
OUT
= −V
REF
) to midscale
(V
OUT
0 V) to full scale (V
OUT
= +V
REF
)
REF
n
REF
OUT
V
D
V
V
×=
1
2
where:
D is the fractional representation of the digital word loaded
to the DAC:
D = 0 to 4095 (12-bit AD5444)
D = 0 to 16383 (14-bit AD5446)
n is the resolution of the DAC.
When V
IN
is an ac signal, the circuit performs 4-quadrant
multiplication.
Table 6 shows the relationship between digital code and the
expected output voltage for bipolar operation.
Table 6. Bipolar Code
Digital Input Analog Output (V)
1111 1111 1111 +V
REF
(2047/2048)
1000 0000 0000 0
0000 0000 0001
−V
REF
(2047/2048)
0000 0000 0000 −V
REF
(0/2048)
Stability
In the current-to-voltage (I-to-V) configuration, the I
OUT
1of the
DAC and the inverting node of the op amp must be connected
as closely as possible, and proper PCB layout techniques must
be employed. Because every code change corresponds to a step
function, gain peaking can occur if the op amp has limited GBP
and excessive parasitic capacitance exists at the inverting node.
This parasitic capacitance introduces a pole into the open-loop
response that can cause ringing or instability in the closed-loop
applications circuit.
An optional compensation capacitor (C1) can be added in
parallel with R
FB
for stability, as shown in Figure 38 and
Figure 39. Too small a value for C1 can produce ringing at
the output, while too large a value can adversely affect the
settling time. C1 should be found empirically, but 1 pF to
2 pF is generally adequate for the compensation.
04588-031
I
OUT
1
I
OUT
2
AD5444/
AD5446
V
REF
V
DD
C1
A1
V
OUT
= –V
REF
TO +V
REF
AGND
R2
V
DD
V
REF
±10V
SDIN
SCLKSYNC
MICROCONTROLLER
A2
R4
10kΩ
R5
20kΩ
NOTES
1. R1 AND R2 USED ONLY IF GAINADJUSTMENT IS REQUIRED.
ADJUST R1 FOR V
OUT
= 0V WITH CODE 10000000 LOADED TO DAC.
2. MATCHING AND TRACKING IS ESSENTIAL FOR RESISTOR PAIRS
3. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED,
IFA1/A2 IS A HIGH SPEED AMPLIFIER.
R3 AND R4.
R3
20kΩ
R1
R
FB
Figure 39. Bipolar Operation (4-Quadrant Multiplication)