Datasheet

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12-/14-Bit High Bandwidth

Multiplying DACs with Serial Interface

Data Sheet

AD5444/AD5446

Rev. E Document Feedback

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FEATURES

12 MHz multiplying bandwidth

INL of ± 0.5 LSB at 12 bits

Pin-compatible 12-/14-bit current output DAC

2.5 V to 5.5 V supply operation

10-lead MSOP package

±10 V reference input

50 MHz serial interface

2.7 MSPS update rate

Extended temperature range: −40°C to +125°C

4-quadrant multiplication

Power-on reset with brownout detection

0.4 µA typical current consumption

Guaranteed monotonic

APPLICATIONS

Portable, battery-powered applications

Waveform generators

Analog processing

Instrumentation applications

Programmable amplifiers and attenuators

Digitally controlled calibration

Programmable filters and oscillators

Composite video

Ultrasound

Gain, offset, and voltage trimming

Automotive radar

GENERAL DESCRIPTION

The AD5444/AD5446

are CMOS 12-bit and 14-bit, current

output, digital-to-analog converters (DACs). Operating from a

single 2.5 V to 5.5 V power supply, these devices are suited for

battery-powered and other applications.

As a result of the CMOS submicron manufacturing process,

these parts offer excellent 4-quadrant multiplication char-

acteristics of up to 12 MHz.

These DACs use a double-buffered, 3-wire serial interface that

is compatible with SPI®, QSPI™, MICROWIRE™, and most DSP

interface standards. On power-up, the internal shift register and

latches are filled with 0s, and the DAC output is at zero scale.

The applied external reference input voltage (V

REF

) determines

the full-scale output current. These parts can handle ±10 V

inputs on the reference, despite operating from a single-supply

power supply of 2.5 V to 5.5 V. An integrated feedback resistor

) provides temperature tracking and full-scale voltage output

when combined with an external current-to-voltage precision

amplifier. The AD5444/AD5446 DACs are available in small

10-lead MSOP packages, which are pin-compatible with the

AD5425/AD5426/AD5432/AD5443 family of DACs.

The EV-AD5443/46/53SDZ board is available for evaluating

DAC performance. For more information, see the UG-327

evaluation board user guide.

US Patent Number 5,689,257.

FUNCTIONAL BLOCK DIAGRAM

04588-001

POWER-ON

RESET

GND

REF

OUT

SDO

CONTROL LOGIC AND

INPUT SHIFT REGISTER

DAC REGISTER

12-BIT

R-2R DAC

INPUT LATCH

SCLK

SDIN

SYNC

AD5444/

AD5446

Figure 1.

Summary of content (29 pages)

PAGE 1
2-/14-Bit High Bandwidth Multiplying DACs with Serial Interface AD5444/AD5446 Data Sheet FEATURES GENERAL DESCRIPTION 12 MHz multiplying bandwidth INL of ± 0.5 LSB at 12 bits Pin-compatible 12-/14-bit current output DAC 2.5 V to 5.5 V supply operation 10-lead MSOP package ±10 V reference input 50 MHz serial interface 2.7 MSPS update rate Extended temperature range: −40°C to +125°C 4-quadrant multiplication Power-on reset with brownout detection 0.
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AD5444/AD5446 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 DAC Section................................................................................ 15 Applications ....................................................................................... 1 Circuit Operation ....................................................................... 15 General Description ..............................................
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Data Sheet AD5444/AD5446 SPECIFICATIONS VDD = 2.5 V to 5.5 V, VREF = 10 V, IOUT2 = 0 V. Temperature range for Y version: −40°C to +125°C. All specifications TMIN to TMAX, unless otherwise noted. DC performance measured with OP177, and ac performance measured with AD8038, unless otherwise noted. Table 1.
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AD5444/AD5446 Parameter DYNAMIC PERFORMANCE1 Reference Multiplying Bandwidth Multiplying Feedthrough Error Data Sheet Min Typ Max 12 Unit Conditions MHz VREF = ±3.5 V, DAC loaded with all 1s VREF = ±3.
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Data Sheet AD5444/AD5446 TIMING CHARACTERISTICS All input signals are specified with tr = tf = 1 ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. VDD = 2.5 V to 5.5 V, VREF = 10 V, IOUT2 = 0 V, temperature range for Y version: −40°C to +125°C; all specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter1 fSCLK t1 t2 t3 t4 t5 t6 t7 t8 t9 Update Rate 1 VDD = 4.5 V to 5.5 V 50 20 8 8 8 5 4.5 5 30 23 2.7 VDD = 2.5 V to 5.5 V 50 20 8 8 8 5 4.5 5 30 30 2.
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AD5444/AD5446 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Parameter VDD to GND VREF, RFB to GND IOUT1, IOUT2 to GND Logic Inputs and Outputs 1 Input Current (All Pins Except Supplies) Operating Temperature Range Extended (Y Version) Storage Temperature Range Junction Temperature 10-lead MSOP θJA Thermal Impedance Lead Temperature, Soldering (10 sec) IR Reflow, Peak Temperature (<20 sec) 1 Rating −0.3 V to +7 V −12 V to +12 V −0.3 V to +7 V −0.3 V to VDD + 0.
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Data Sheet AD5444/AD5446 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IOUT1 1 IOUT2 2 AD5444/ AD5446 10 RFB 9 VREF VDD TOP VIEW SCLK 4 (Not to Scale) 7 SDO SDIN 5 8 6 SYNC 04588-005 GND 3 Figure 5. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 Mnemonic IOUT1 IOUT2 GND SCLK 5 SDIN 6 SYNC 7 SDO 8 9 10 VDD VREF RFB Description DAC Current Output. DAC Analog Ground. This pin should normally be tied to the analog ground of the system. Ground Pin. Serial Clock Input.
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AD5444/AD5446 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 0.5 2.0 TA = 25°C VREF = 10V VDD = 5V 1.2 0.8 0.1 0.4 DNL (LSB) 0.2 0 –0.1 0 –0.4 –0.2 –0.8 –0.3 –1.2 04588-006 INL (LSB) 0.3 –0.4 –0.5 0 512 TA = 25°C VREF = 10V VDD = 5V 1.6 1024 1536 2048 CODE 2560 3072 3584 04588-077 0.4 –1.6 –2.0 0 4096 2048 6144 8192 10240 12288 14336 16384 9 10 9 10 CODE Figure 6. INL vs. Code (12-Bit DAC) Figure 9. DNL vs. Code (14-Bit DAC) 2.0 1.
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Data Sheet AD5444/AD5446 0.3 1.0 VREF = 10V TA = 25°C VREF = 10V VDD = 5V 0.8 0.6 0.2 GAIN ERROR (LSB) 0.2 0 –0.2 –0.4 –0.6 0.1 VDD = 3V VDD = 5V 0 –0.1 04588-013 –0.2 –0.8 –1.0 0 512 1024 1536 2048 CODE 2560 3072 3584 –0.3 –60 4096 2.0 –20 0 100 120 140 9 10 TA = 25°C VDD = 5V AD5444 1.5 1.0 GAIN ERROR (LSB) 0.8 0.4 0 –0.4 –0.8 0.5 0 –0.5 –1.0 04588-078 –1.2 –2.0 0 2048 4096 6144 8192 10240 12288 14336 –1.5 04588-051 –1.6 –2.
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AD5444/AD5446 Data Sheet 2.5 1.8 TA = 25°C TA = 25°C 1.6 VIH 1.5 VDD = 5V 1.0 0.5 0 0 3 2 INPUT VOLTAGE (V) 1 1.0 0.8 0.6 0.4 0 2.5 5 4 1.2 0.2 04588-018 VDD = 3V 3.0 Figure 18. Supply Current vs. Logic Input Voltage 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 10 ALL 1s ALL 0s 0.6 0 –10 GAIN (dB) VDD = 5V 0.3 TA = 25°C LOADING ZS TO FS ALL ON DB13 DB12 0.5 0.4 5.5 Figure 21. Threshold Voltage vs. Supply Voltage 0.7 –20 DB11 DB10 –30 DB9 DB8 –40 DB7 DB6 –50 DB5 0.
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Data Sheet AD5444/AD5446 3 10 TA = 25°C VDD = 5V TA = 25°C VDD = 3V AD8038 AMPLIFIER 0 –10 0 –20 PSRR (dB) GAIN (dB) –30 –3 –40 FULL SCALE –50 –60 100k 1M ZERO SCALE –70 = ±2V, AD8038 C COMP = 1pF = ±2V, AD8038 C COMP = 1.5pF = ±15V, AD8038 C COMP = 1pF = ±15V, AD8038 C COMP = 1.5pF = ±15V, AD8038 C COMP = 1.8pF –80 –90 –100 100M 10M 04588-060 –9 10k VREF VREF VREF VREF VREF 04588-057 –6 1 10 100 1k 1M 10M –60 0.08 VDD = 3V 0x7FF TO 0x800 NRG = 1.794nV-s –65 –70 0.
PAGE 13
AD5444/AD5446 Data Sheet 0 0 TA = 25°C VDD = 5V VREF = 3.5V AD8038 AMP –20 –20 –40 –40 –60 –60 –80 –100 –100 04588-063 –80 –120 0 100k 200k 300k 400k –120 10k 500k 04588-065 SFDR (dB) SFDR (dB) TA = 25°C VDD = 5V VREF = 3.5V AD8038 AMP 15k FREQUENCY (Hz) Figure 30. Wideband SFDR , fOUT = 20 kHz, Clock = 1 MHz 0 0 30k TA = 25°C VDD = 5V VREF = 3.
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Data Sheet AD5444/AD5446 0 80 TA = 25°C VREF = 3.5V AD8038 AMP –10 TA = 25°C AD8038 AMP 70 IMD (dB) –30 –40 –50 –60 –70 60 FULL SCALE LOADED TO DAC 50 40 MIDSCALE LOADED TO DAC 30 20 04588-067 –80 –90 –100 10k 15k 20k 25k 30k 0 100 35k FREQUENCY (Hz) 0 TA = 25°C VREF = 3.5V AD8038 AMP –20 IMD (dB) –30 –40 –50 –60 –70 04588-068 –80 –90 –100 0 100k 200k 300k 1k 10k 100k FREQUENCY (Hz) Figure 34.
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AD5444/AD5446 Data Sheet TERMINOLOGY Relative Accuracy or Integral Nonlinearity Relative accuracy or integral nonlinearity is a measure of the maximum deviation from a straight line passing through the endpoints of the DAC transfer function. It is measured after adjusting for zero scale and full scale and is normally expressed in LSBs or as a percentage of full-scale reading.
PAGE 16
Data Sheet AD5444/AD5446 GENERAL DESCRIPTION CIRCUIT OPERATION DAC SECTION Unipolar Mode The AD5444/AD5446 are 12-bit and 14-bit current output DACs consisting of segmented (4 bits), inverting R– 2R ladder configurations. A simplified diagram for the 12-bit AD5444 is shown in Figure 37.
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AD5444/AD5446 Data Sheet Bipolar Operation Table 6 shows the relationship between digital code and the expected output voltage for bipolar operation. In some applications, it may be necessary to generate a full 4-quadrant multiplying operation, or a bipolar output swing. This can easily be accomplished by using another external amplifier and some external resistors, as shown in Figure 39. In this circuit, the second amplifier (A2) provides a gain of 2.
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Data Sheet AD5444/AD5446 SINGLE-SUPPLY APPLICATIONS VDD = +5V ADR03 VOUT VIN Voltage Switching Mode of Operation VDD R1 RFB VIN R2 VDD VREF IOUT1 VOUT NOTES 1. ADDITIONAL PINS OMITTED FOR CLARITY. 2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED, IF A1 IS A HIGH SPEED AMPLIFIER. 04588-032 GND Figure 40.
PAGE 19
AD5444/AD5446 Data Sheet The input bias current of an op amp also generates an offset at the voltage output as a result of the bias current flowing in the feedback resistor, RFB. Most op amps have input bias currents low enough to prevent any significant errors in 12-bit applications. VDD VIN RFB VDD VREF IOUT1 GND Common-mode rejection of the op amp is important in voltage switching circuits because it produces a code-dependent error at the voltage output of the circuit.
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Data Sheet AD5444/AD5446 Table 7. Suitable Analog Devices Precision References Part No. ADR01 ADR01 ADR02 ADR02 ADR03 ADR03 ADR06 ADR06 ADR431 ADR435 ADR391 ADR395 Output Voltage (V) 10 10 5 5 2.5 2.5 3 3 2.5 5 2.5 5 Initial Tolerance Accuracy (%) 0.05 0.05 0.06 0.06 0.10 0.10 0.10 0.10 0.04 0.04 0.16 0.10 Temperature Drift Coefficient (ppm/°C) 3 9 3 9 3 9 3 9 3 3 9 9 ISS (mA) 1 1 1 1 1 1 1 1 0.8 0.8 0.12 0.12 Output Noise (µV p-p) 20 20 10 10 6 6 10 10 3.
PAGE 21
AD5444/AD5446 Data Sheet SERIAL INTERFACE The AD5444/AD5446 have an easy-to-use, 3-wire interface that is compatible with SPI, QSPI, MICROWIRE, and DSP interface standards. Data is written to the device in 16-bit words. This 16-bit word consists of two control bits, 12 data bits or 14 data bits, as shown in Figure 44 and Figure 45. The AD5446 uses all 14 bits of DAC data while AD5444 uses 12 bits and ignores the 2 LSBs.
PAGE 22
Data Sheet AD5444/AD5446 MICROPROCESSOR INTERFACING Table 11. SPORT Control Register Setup Microprocessor interfacing to the AD5444/AD5446 DAC is through a serial bus that uses standard protocol compatible with microcontrollers and DSP processors. The communications channel is a 3-wire interface consisting of a clock signal, a data signal, and a synchronization signal.
PAGE 23
AD5444/AD5446 Data Sheet MC68HC11* A serial interface between the DAC and the 80C51/80L51 is shown in Figure 50. TxD of the 80C51/80L51 drives SCLK of the DAC serial interface, while RxD drives the serial data line, SDIN. P1.1 is a bit-programmable pin on the serial port and is used to drive SYNC. When data is to be transmitted to the switch, P1.1 is taken low. The 80C51/80L51 transmits data only in 8-bit bytes; therefore, only eight falling clock edges occur in the transmit cycle.
PAGE 24
Data Sheet AD5444/AD5446 PCB LAYOUT AND POWER SUPPLY DECOUPLING In any circuit where accuracy is important, careful consideration of the power supply and ground return layout helps to ensure the rated performance. The printed circuit boards on which the AD5444/AD5446 are mounted should be designed so the analog and digital sections are separated and confined to certain areas of the board.
PAGE 25
AD5444/AD5446 Data Sheet OVERVIEW OF AD54xx AND AD55xx CURRENT OUTPUT DEVICES Table 12. Part Number AD5424 AD5426 AD5428 AD5429 AD5450 AD5432 AD5433 AD5439 AD5440 AD5451 AD5443 AD5444 AD5415 AD5405 AD5445 AD5447 AD5449 AD5452 AD5446 AD5453 AD5553 AD5556 AD5555 AD5557 AD5543 AD5546 AD5545 AD5547 1 Resolution (Bits) 8 8 8 8 8 10 10 10 10 10 12 12 12 12 12 12 12 12 14 14 14 14 14 14 16 16 16 16 Number of DACs 1 1 2 2 1 1 1 2 2 1 1 1 2 2 2 2 2 1 1 1 1 1 2 2 1 1 2 2 INL (LSB) ±0.25 ±0.25 ±0.25 ±0.25 ±0.
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Data Sheet AD5444/AD5446 OUTLINE DIMENSIONS 3.10 3.00 2.90 10 3.10 3.00 2.90 1 5.15 4.90 4.65 6 5 PIN 1 IDENTIFIER 0.50 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 0.30 0.15 6° 0° 0.23 0.13 0.70 0.55 0.40 COMPLIANT TO JEDEC STANDARDS MO-187-BA 091709-A 0.15 0.05 COPLANARITY 0.10 Figure 54.
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AD5444/AD5446 Data Sheet NOTES Rev.
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Data Sheet AD5444/AD5446 NOTES Rev.