Datasheet

AD5426/AD5432/AD5443 Data Sheet
Rev. G | Page 4 of 24
Parameter Min Typ Max Unit Test Conditions/Comments
Output Capacitance
I
OUT
1 12 17 pF All 0s loaded
10 12 pF All 1s loaded
I
OUT
2 22 25 pF All 0s loaded
10
12
pF
All 1s loaded
Digital Feedthrough 0.1 nV-s
Feedthrough to DAC output with
SYNC
high and
alternate loading of all 0s and all 1s
Analog THD 81 dB V
REF
= 3.5 V p-p, all 1s loaded, f = 1 kHz
Digital THD Clock = 1 MHz, V
REF
= 3.5 V, C
COMP
= 1.8 pF
50 kHz f
OUT
73 dB
20 kHz f
OUT
74 dB
Output Noise Spectral Density 25 nV/√Hz @ 1 kHz
SFDR Performance (Wide Band) Clock = 1 MHz, V
REF
= 3.5 V
50 kHz f
OUT
75 dB
20 kHz f
OUT
76 dB
SFDR Performance (Narrow Band) Clock = 1 MHz, V
REF
= 3.5 V
50 kHz f
OUT
87 dB
20 kHz f
OUT
87 dB
Intermodulation Distortion 78 dB Clock = 1 MHz, f
1
= 20 kHz, f
2
= 25 kHz, V
REF
= 3.5 V
POWER REQUIREMENTS
Power Supply Range 2.5 5.5 V
I
DD
0.6 µA T
A
= 25°C, logic inputs = 0 V or V
DD
0.4 5 µA T = −40°C to +125°C , logic inputs = 0 V or V
DD
Power Supply Sensitivity
1
0.001 %/% ∆V
DD
= ±5%
1
Guaranteed by design and characterization, not subject to production testing.