Datasheet

Data Sheet AD5428/AD5440/AD5447
Rev. C | Page 5 of 32
TIMING CHARACTERISTICS
All input signals are specified with tr = tf = 1 ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2. V
DD
= 2.5 V to 5.5 V,
V
REF
= 10 V, I
OUT
2 = 0 V, temperature range for Y version: −40°C to +125°C. All specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
1
Limit at T
MIN
, T
MAX
Unit Conditions/Comments
Write Mode
t
1
0 ns min
R/W
to CS setup time
t
2
0 ns min
R/W
to CS hold time
t
3
10 ns min
CS
low time
t
4
10 ns min Address setup time
t
5
0 ns min Address hold time
t
6
6 ns min Data setup time
t
7
0 ns min Data hold time
t
8
5 ns min
R/W
high to CS low
t
9
7 ns min
CS
min high time
Data Readback Mode
t
10
0 ns typ Address setup time
t
11
0 ns typ Address hold time
t
12
5 ns typ Data access time
25 ns max
t
13
5 ns typ Bus relinquish time
10 ns max
Update Rate 21.3 MSPS
Consists of CS
min high time, CS low time, and output
voltage settling time
1
Guaranteed by design and characterization, not subject to production test.
04462-002
DATA VALID DATA VALID
DATA
DACA/DAC
B
CS
R/W
t
1
t
3
t
4
t
10
t
5
t
8
t
7
t
11
t
9
t
2
t
8
t
2
t
12
t
13
Figure 2. Timing Diagram
04462-003
TO OUTPUT
PIN
V
OH (MIN)
+ V
OL (MAX)
200μAI
OH
200μAI
OL
2
C
L
50pF
Figure 3. Load Circuit for Data Output Timing Specifications