Datasheet

Data Sheet AD5425
Rev. C | Page 21 of 24
MICROWIRE-to-AD5425 Interface
Figure 44 shows an interface between the DAC and any
MICROWIRE
-compatible device. Serial data is shifted out on
the falling edge of the serial clock, SK, and is clocked into the
DAC input shift register on the rising edge of SK, which
corresponds to the falling edge of the DAC’s SCLK.
Figure 44. MICROWIRE-to-AD5425 Interface
PIC16C6x/7x-to-AD5425
The PIC16C6x/7x synchronous serial port (SSP) is configured
as an SPI master with the clock polarity bit (CKP) = 0. This is
done by writing to the synchronous serial port control register
(SSPCON) (see the PIC16/17 microcontroller user manual). In
this example, I/O Port RA1 is being used to provide a
SYNC
signal and enable the DAC serial port. This microcontroller
transfers eight bits of data during each serial transfer operation.
Figure 45 shows the connection diagram.
Figure 45. PIC16C6x/7x-to-AD5425 Interface
03161-044
CS
AD5425
1
SCLK
SK
SDIN
SO
MICROWIRE
1
1
ADDITIONAL PINS OMITTED FOR CLARITY.
SYNC
03161-045
RA1
AD5425
1
SCLKSCK/RC3
SDINSDI/RC4
PIC16C6x/7x
1
1
ADDITIONAL PINS OMITTED FOR CLARITY.
SYNC