Datasheet

AD5425 Data Sheet
Rev. C | Page 16 of 24
SINGLE-SUPPLY APPLICATIONS
Current Mode Operation
In the current mode circuit of Figure 32, I
OUT
2 and hence I
OUT
1
is biased positive by an amount applied to V
BIAS
. In this config-
uration, the output voltage is given by
V
OUT
= [D × (R
FB
/R
DAC
) × (V
BIAS
− V
IN
)] + V
BIAS
As D varies from 0 to 255, the output voltage varies from
V
OUT
= V
BIAS
to V
OUT
= 2V
BIAS
− V
IN
Figure 32. Single-Supply Current Mode Operation
V
BIAS
should be a low impedance source capable of sinking and
sourcing all possible variations in current at the I
OUT
2 terminal
without any problems.
It is important to note that V
IN
is limited to low voltages because
the switches in the DAC ladder no longer have the same source-
drain drive voltage. As a result, their on resistance differs and
this degrades the linearity of the DAC.
Voltage Switching Mode of Operation
Figure 33 shows this DAC operating in the voltage switching
mode. The reference voltage V
IN
is applied to the I
OUT
1 pin,
I
OUT
2 is connected to AGND, and the output voltage is available
at the V
REF
terminal. In this configuration, a positive reference
voltage results in a positive output voltage, making single-
supply operation possible. The output from the DAC is voltage
at a constant impedance (the DAC ladder resistance), thus an
op amp is necessary to buffer the output voltage. The reference
input no longer sees constant input impedance, but one that
varies with code. So, the voltage input should be driven from a
low impedance source.
Figure 33. Single-Supply Voltage Switching Mode Operation
It is important to note that V
IN
is limited to low voltage because
the switches in the DAC ladder no longer have the same source
drain drive voltage. As a result, their on resistance differs, which
degrades the linearity of the DAC.
V
IN
must also not go negative by more than 0.3 V, otherwise an
internal diode turns on, exceeding the maximum ratings of the
device. In this type of application, the full range of the DAC
multiplying capability is lost.
POSITIVE OUTPUT VOLTAGE
Note that the output voltage polarity is opposite to the V
REF
polarity for dc reference voltages. To achieve a positive voltage
output, an applied negative reference to the input of the DAC
is preferred over the output inversion through an inverting
amplifier because of the resistor tolerance errors. To generate
a negative reference, the reference can be level shifted by an
op amp such that the V
OUT
and GND pins of the reference
become the virtual ground and −2.5 V respectively, as shown
in Figure 34.
Figure 34. Positive Voltage Output with Minimum of Components
V
OUT
GND
V
IN
I
OUT
2
I
OUT
1
R
FB
A1
V
REF
V
DD
V
BIAS
V
DD
C1
NOTES:
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE
REQUIRED IF A1 IS A HIGH SPEED AMPLIFIER.
A1
03161-032
V
IN
R2R1
V
OUT
GND
I
OUT
2
I
OUT
1
R
FB
A1
V
REF
V
DD
V
DD
NOTES:
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
A1
03161-033
NOTES:
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED IF A1 IS A
HIGH SPEED AMPLIFIER.
V
OUT
= 0V
TO +2.5V
GND
I
OUT
2
I
OUT
1
R
FB
A1
V
REF
V
DD
= 5V
V
DD
C1
GND
V
IN
V
OUT
ADR03
–2.5V
–5V
+5V
03161-034