Datasheet

Data Sheet AD5425
Rev. C | Page 9 of 24
Figure 10. Linearity vs. V
BIAS
Voltage Applied to I
OUT
2
Figure 11. Gain and Offset Errors vs. V
BIAS
Voltage Applied to I
OUT
2
Figure 12. Linearity vs. V
BIAS
Voltage Applied to I
OUT
2
Figure 13. Gain and Offset Errors vs. Voltage Applied to I
OUT
2
Figure 14. Gain and Offset Errors vs. V
BIAS
Voltage Applied to I
OUT
2
Figure 15. Linearity vs. V
BIAS
Voltage Applied to I
OUT
2
03161-010
V
BIAS
(V)
1.50.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4
LSBs
0.5
0.3
0.1
–0.1
–0.3
–0.5
MAX INL
MIN INL
MAX DNL
MIN DNL
T
A
= 25°C
V
DD
= 3V
V
REF
= 0V
03161-011
V
BIAS
(V)
1.50.5 1.0
VOLTAGE(mV)
1.4
0.8
1.0
1.2
0.4
0.6
0
0.2
–0.2
–0.4
GAIN ERROR
OFFSET ERROR
T
A
= 25°C
V
DD
= 3V
V
REF
= 0V
03161-012
V
BIAS
(V)
2.50.5 1.0 1.5 2.0
LSBs
0.5
0.3
–0.1
0.1
–0.3
–0.5
MAX INL
MIN INL
MAX DNL
MIN DNL
V
DD
= 5V
V
REF
= 0V
03161-013
V
BIAS
(V)
2.50.5 1.0 1.5 2.0
VOLTAGE (mV)
2.5
2.0
1.5
1.0
0.5
0
–0.5
GAIN ERROR
OFFSET ERROR
V
DD
= 5V
V
REF
= 0V
03161-014
V
BIAS
(V)
2.50 0.5 1.0 1.5 2.0
VOLTAGE (mV)
10.0
6.0
8.0
2.0
4.0
–2.0
0
–4.0
GAIN ERROR
OFFSET ERROR
T
A
= 25°C
V
DD
= 5V
V
REF
= 2.5V
03161-015
V
BIAS
(V)
2.00 0.5 1.0 1.5
LSBs
1.0
0.4
0.6
0.8
0
0.2
–0.6
–0.4
–0.2
–0.8
–1.0
MAX INL BIAS
MIN INL BIAS
T
A
= 25°C
V
DD
= 5V
V
REF
= 2.5V
MAX DNL BIAS
MIN DNL BIAS