Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Companion Products
- Table of Contents
- Functional Block Diagram
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Typical Performance Characteristics
- Terminology
- Theory of Operation
- AD5412/AD5422 Features
- Fault Alert
- Voltage Output Short Circuit Protection
- Voltage Output Overrange
- Voltage Output Force-Sense
- Asynchronous Clear (CLEAR)
- Internal Reference
- External Current Setting Resistor
- Digital Power Supply
- External Boost Function
- External Compensation Capacitor
- HART Communication
- Digital Slew Rate Control
- IOUT Filtering Capacitors (LFCSP Package)
- Applications Information
- Outline Dimensions

Data Sheet AD5412/AD5422
Rev. I | Page 37 of 44
APPLICATIONS INFORMATION
VOLTAGE AND CURRENT OUTPUT RANGES ON
THE SAME TERMINAL
The current and voltage output pins can be connected together.
A buffer amplifier is required however to prevent a current
leakage path through an internal 40k resistor on the +V
SENSE
pin,
when the device is in current output mode. In current mode the
V
OUT
pin is high impedance while in voltage output mode, the
I
OUT
pin is high impedance and will not affect the voltage
output. It is important that the external R
SET
be used in this
configuration, as depicted in Figure 77.
I
OUT
AD5412/
AD5422
I
OUT
/V
OUT
+V
SENSE
–V
SENSE
V
OUT
R
SET
OP07/OP184
06996-071
Figure 77. I
OUT
and V
OUT
Connected Together
DRIVING INDUCTIVE LOADS
When driving inductive or poorly defined loads, connect a
0.01 µF capacitor between I
OUT
and GND. This ensures stability
with loads above 50 mH. There is no maximum capacitance
limit. The capacitive component of the load may cause slower
settling. The digital slew rate control feature may also prove
useful in this situation.
TRANSIENT VOLTAGE PROTECTION
The AD5412/AD5422 contain ESD protection diodes that
prevent damage from normal handling. The industrial control
environment can, however, subject I/O circuits to much higher
transients. To protect the AD5412/AD5422 from excessively
high voltage transients, external power diodes and a surge
current limiting resistor are required, as shown in Figure 78.
The constraint on the resistor value is that, during normal
operation, the output level at I
OUT
must remain within its voltage
compliance limit of AV
DD
– 2.5 V, and the two protection diodes
and resistor must have appropriate power ratings. Further
protection can be provided with transient voltage suppressors or
transorbs; these are available as both unidirectional suppressors
(protect against positive high voltage transients) and
bidirectional suppressors (protect against both positive and
negative high voltage transients) and are available in a wide
range of standoff and breakdown voltage ratings. It is
recommended that all field connected nodes be protected.
AV
DD
I
OUT
R
LOAD
R
P
AV
DD
AD5412/
AD5422
GND AV
SS
AV
SS
06996-064
Figure 78. Output Transient Voltage Protection
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. The
iCoupler® products from Analog Devices, Inc., provide voltage
isolation in excess of 2.5 kV. The serial loading structure of the
AD5412/AD5422 makes the parts ideal for isolated interfaces
because the number of interface lines is kept to a minimum.
Figure 79 shows a 4-channel isolated interface to the AD5412/
AD5422 using an ADuM1400. For further information, visit
www.analog.com/isolators.
ENCODE
SERIAL
CLOCK IN
CONTROLLER
ADuM1400
1
SERIAL
D
ATA OUT
SYNC OUT
CONTROL
OUT
DECODE
TO
SCLK
TO
SDIN
TO
L
ATCH
TO
CLEAR
V
I
A
V
O
A
ENCODE DECODE
V
IB
V
OB
ENCODE DECODE
V
IC
V
OC
ENCODE DECODE
V
ID
V
OD
06996-065
1
ADDITIONAL PINS OMITTED FOR CLARIT
Y.
Figure 79. Isolated Interface
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5412/AD5422 is via a serial
bus that uses a protocol compatible with microcontrollers and
DSP processors. The communications channel is a 3-wire
minimum interface consisting of a clock signal, a data signal,
and a latch signal. The AD5412/AD5422 require a 24-bit data-
word with data valid on the rising edge of SCLK.
For all interfaces, the DAC output update is initiated on the
rising edge of LATCH. The contents of the registers can be
read using the readback function.