Datasheet

Data Sheet AD5410/AD5420
Rev. F | Page 7 of 32
DB23
SCLK
LATCH
SDIN
2421
DB0
t
1
t
2
t
6
t
7
t
8
t
9
t
10
t
3
t
4
t
5
CLEAR
I
OUT
07027-002
Figure 2. Write Mode Timing Diagram
SCLK
LATCH
SDIN
2421
DB0DB23
t
11
t
12
t
13
t
14
t
15
t
16
t
17
t
18
t
19
t
20
SDO
DB23
SELECTED REGISTER
DATA CLOCKED OUT
NOP CONDITION
UNDEFINED DATA
INPUT WORD SPECIFIES
REGISTER TO BE READ
1
2
24
DB0
DB0
DB15XXXX
8
923
22
FIRST 8 BITS ARE
DON’T CARE BITS
07027-003
Figure 3. Readback Mode Timing Diagram
SCLK
SDIN
2421
DB0
SDO
DB0
DB0
INPUT WORD FOR DAC N
INPUT WORD FOR DAC N – 1
UNDEFINED
INPUT WORD FOR DAC N
25
4826
LATCH
t
21
t
22
t
23
t
24
t
27
t
28
t
26
t
29
t
25
DB23
DB23
DB23
DB23
DB0
07027-004
Figure 4. Daisy-Chain Mode Timing Diagram