Datasheet

AD5410/AD5420 Data Sheet
Rev. F | Page 8 of 32
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted. Transient currents of up to
80 mA do not cause SCR latch-up.
Table 4.
Parameter Rating
AV
DD
to GND
−0.3 V to +60 V
DV
CC
to GND −0.3 V to +7 V
Digital Inputs to GND
−0.3 V to DV
CC
+ 0.3 V or +7 V
(whichever is less)
Digital Outputs to GND
−0.3 V to DV
CC
+ 0.3 V or +7 V
(whichever is less)
REFIN, REFOUT to GND −0.3 V to +7 V
I
OUT
to GND −0.3 V to AV
DD
Operating Temperature Range
Industrial −40°C to +85°C
1
Storage Temperature Range −65°C to +150°C
Junction Temperature (T
J
max)
125°C
24-Lead TSSOP_EP Package
Thermal Impedance, θ
JA
35°C/W
2
Thermal Impedance, θ
JC
9°C/W
40-Lead LFCSP Package
Thermal Impedance, θ
JA
33°C/W
2
Thermal Impedance, θ
JC
4°C/W
Power Dissipation (T
J
max − T
A
)/θ
JA
Lead Temperature JEDEC industry standard
Soldering J-STD-020
ESD (Human Body Model) 2 kV
1
Power dissipated on chip must be derated to keep junction temperature
below 125°C. The assumption is that the maximum power dissipation
condition is sourcing 24 mA into ground from AV
DD
with a 4 mA on-chip
current.
2
Thermal impedance simulated values are based on JEDEC 2S2P thermal test
board with thermal vias. Ref: JEDEC JESD51 documents.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION