Datasheet

Data Sheet AD5410/AD5420
Rev. F | Page 21 of 32
RESET REGISTER
The reset register is addressed by setting the address byte of the
input shift register to 0x56. The reset register contains a single
reset bit at Position DB0, as shown in Tabl e 16. Writing a logic
high to this bit performs a reset operation, restoring the part to
its power-on state.
STATUS REGISTER
The status register is a read-only register. The status register bit
functionality is shown in Table 15 and Table 17.
Table 15. Status Register Bit Functions
Bit Description
I
OUT
Fault This bit is set if a fault is detected on the I
OUT
pin.
Slew Active
This bit is set while the output value is slewing
(slew rate control enabled).
Overtemp
This bit is set if the AD5410/AD5420 core
temperature exceeds approximately 150°C.
Table 16. Programming the Reset Register
MSB LSB
DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Reserved Reset
Table 17. Decoding the Status Register
MSB LSB
DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Reserved I
OUT
fault Slew active Overtemp