Datasheet

AD5405
Rev. B | Page 17 of 24
onsequently, the slew rate and settling time of a voltage-
the output op
onfiguration,
c n n
ppli on) of the DAC. This is done by using low in t
nce fer amplifiers and c oard design.
Most single-supply circuits include ground as part of the analog
signal range, which in turn requires an amplifier that can
handle rail-to-rail signals. Analog Devices offers a wide range of
ppl rs T
. Su le ADI Precision References
. put Voltage (V) l Tolerance (%) mp Drift (ppm/°C) (mA) tput Noise (μV p-p)
C
switching DAC circuit is determined largely by
amp. To obtain minimum settling time in this c
minimize apacitance at the V
REF
ode (the voltage output ode
single-su
in this a cati pu
capacita buf areful b
y amplifie , as listed in Table 8 and able 9.
Table 7 itab
Part No Out Initia Te I
SS
Ou Package
ADR01 10 0.05 3 1 20 SOIC-8
ADR01 10 0.05 9 1 20 TSOT-23, SC70
ADR02 5 0.06 3 1 10 SOIC-8
ADR02 5 0.06 9 1 10 , SC70 TSOT-23
ADR03 2.5 0.10 3 1 6 SOIC-8
ADR03 2.5 0.10 9 1 6 TSOT-23, SC70
ADR06 3 0.10 3 1 10 SOIC-8
ADR06 3 0.10 9 1 10 TSOT-23, SC70
ADR431 2.5 0.04 3 3.5 SOIC-8 0.8
ADR435 5 0 .04 3 0.8 8 SOIC-8
ADR391 2 0.16 0.12 .5 9 5 TSOT-23
ADR395 5 0.10 9 0.12 8 TSOT-23
Table 8. Sui I Precision Op ps
art No. Supply Voltage (V) V
OS
(Max) (μV) I
B
(Max) (nA)
z to 10 Hz
Noise (μV p-p)
Supply Current (μA) Package
table AD Am
P
0.1 H
OP97 ±2 to ±20 25 0.1 0.5 600 SOIC-8
OP1177 ±2.5 to ±15 60 2 5 OP, SOIC-8 0.4 00 MS
AD8551 2.7 to 5 5 0. 905 1 75 MSOP, SOIC-8
AD8603 1.8 to 6 0.001 2.3 50 50 TSOT
AD8628 2.7 to 6 0.1 0.5 850 5 TSOT, SOIC-8
Table 9. Suitable ADI High Speed Op Amps
art No. Supply Voltage (V) BW @ ACL (MHz) Slew Rate (V/μs) VOS (Max) (μV) I
B
(Max) (nA) Package P
AD8065 5 to 24 145 180 1,500 6,000 SOIC-8, SOT-23, MSOP
AD8021 ±2.5 to ±12 490 120 1,000 10,500 SOIC-8, MSOP
AD8038 3 to 12 350 425 3,000 750 SOIC-8, SC70-5
AD9631 ±3 to ±6 320 1,300 10,000 7,000 SOIC-8