Datasheet

AD5390/AD5391/AD5392 Data Sheet
Rev. E | Page 28 of 44
I
2
C WRITE OPERATION
There are three specific modes in which data can be written to
the AD539x family of DACs.
4-BYTE MODE
When writing to the AD539x DACs, begin with an address byte
(R/
W
= 0), after which the DAC acknowledges that it is prepared
to receive data by pulling SDA low. The address byte is followed
by the pointer byte. This addresses the specific channel in the
DAC to be addressed and is also acknowledged by the DAC.
Address Bits A3 to A0 address all channels on the AD5390/
AD5391. Address Bits A2 to A0 address all channels on the
AD5392. Address Bit A3 is a zero on the AD5392. Two bytes
of data are then written to the DAC, as shown in Figure 33.
A STOP condition follows. This lets the user update a single
channel within the AD539x at any time and requires four bytes
of data to be transferred from the master.
REG0 DB13 DB12 DB11 DB10 DB8DB9 DB7 DB6 DB5 DB4 DB3
DB2 DB1 DB0REG1
1 0 0
0 0 0 A3 A2 A1 A0
1 1
AD1 AD0 R/W
SCL
SDA
SCL
SDA
START
CONDITION
BY
MASTER
ACK
BY
CONVERTER
ACK
BY
CONVERTER
ADDRESS BYTE POINTER BYTE
MSB
ACK
BY
CONVERTER
ACK
BY
CONVERTER
STOP
CONDITION
BY
MA
STER
MOST SIGNIFICANT DATA BYTE LEAST SIGNIFICANT DATA BYTE
A/B
03773-023
Figure 33. AD5390/AD5392 4-Byte Mode I
2
C Write Operation
REG0 DB11 DB10 DB9 DB8 DB6DB7 DB5 DB4 DB3 DB2 DB1
DB0 0 0REG1
1 0 0
0 0 0 A3 A2 A1 A0
1 1
AD1 AD0 R/W
SCL
SDA
SCL
SDA
START
CONDITION
BY
MASTER
ACK
BY
CONVERTER
ACK
BY
CONVERTER
ADDRESS BYTE POINTER BYTE
MSB
ACK
BY
CONVERTER
ACK
BY
CONVERTER
STOP
CONDITION
BY
MA
STER
MOST SIGNIFICANT DATA BYTE LEAST SIGNIFICANT DATA BYTE
A/B
03773-021
Figure 34. AD5391 4-Byte Mode I
2
C Write Operation