Datasheet
AD5383 Data Sheet
Rev. C | Page 32 of 40
AD5383 to PIC16C6x/7x
The PIC16C6x/7x synchronous serial port (SSP) is configured
as an SPI master with the clock polarity bit = 0. This is done by
writing to the synchronous serial port control register (SSPCON).
See the PIC16/17 Microcontroller User Manual. In this example
I/O, Port RA1 is being used to pulse
SYNC
and enable the serial
port of the AD5383. This microcontroller transfers only eight
bits of data during each serial transfer operation; therefore,
three consecutive read/write operations may be needed
depending on the mode. Figure 36 shows the connection
diagram.
03734-036
PIC16C6X/7X
AD5383
SDI/RC4
SDO/RC5
SCK/RC3
RA1
SDO
RESET
SER/PAR
DIN
SCLK
SYNC
SPI/I
2
C
DV
DD
Figure 36. AD5383-to-PIC16C6x/7x Interface
AD5383 to 8051
The AD5383 requires a clock synchronized to the serial data.
Therefore, the 8051 serial interface must be operated in Mode 0.
In this mode, serial data enters and exits through RxD, and a
shift clock is output on TxD. Figure 37 shows how the 8051 is
connected to the AD5383. Because the AD5383 shifts data out
on the rising edge of the shift clock and latches data in on the
falling edge, the shift clock must be inverted. The AD5383
requires its data to be MSB first. Since the 8051 outputs the LSB
first, the transmit routine must take this into account.
03734-037
8XC51
AD5383
RxD
TxD
P1.1
SDO
RESET
SER/PAR
DIN
SCLK
SYNC
SPI/I
2
C
DV
DD
Figure 37. AD5383-to-8051 Interface
AD5383 to ADSP-2101/ADSP-2103
Figure 38 shows a serial interface between the AD5383 and the
ADSP-2101/ADSP-2103. The ADSP-2101/ADSP-2103 should
be set up to operate in SPORT transmit alternate framing mode.
The ADSP-2101/ADSP-2103 SPORT is programmed through
the SPORT control register and should be configured as follows:
internal clock operation, active low framing, and 16-bit word
length. Transmission is initiated by writing a word to the Tx
register after the SPORT has been enabled.
03734-038
ADSP-2101/
ADSP-2103
AD5383
DR
DT
SCK
TFS
RFS
SDO
RESET
SER/PAR
DIN
SCLK
DV
DD
SPI/I
2
C
SYNC
Figure 38. AD5383-to-ADSP-2101/ADSP-2103 Interface