Datasheet

AD5372/AD5373
Rev. C | Page 11 of 28
Pin No. Mnemonic Description
56 SDO
Serial Data Output. CMOS output. SDO can be used for readback. Data is clocked out on SDO
on the rising edge of SCLK and is valid on the falling edge of SCLK.
59 AGND Ground for All Analog Circuitry. The AGND pin should be connected to the AGND plane.
63
LDAC
Load DAC Logic Input (Active Low). See the BUSY and LDAC Functions section for more
information.
64
CLR
Asynchronous Clear Input (Level Sensitive, Active Low). See the Clear Function section for
more information.