Datasheet

REV. 0
AD5332/AD5333/AD5342/AD5343
18
Coarse and Fine Adjustment Using the AD5332/AD5333/
AD5342/AD5343
The DACs in the AD5332/AD5333/AD5342/AD5343 can be
paired together to form a coarse and fine adjustment function,
as shown in Figure 39. DAC A is used to provide the coarse
adjustment while DAC B provides the fine adjustment. Varying
the ratio of R1 and R2 will change the relative effect of the coarse
and fine adjustments. With the resistor values shown the output
amplifier has unity gain for the DAC A output, so the output
range is 0 V to 2.5 V – 1 LSB. For DAC B the amplifier has a gain
of 7.6 × 10
–3
, giving DAC B a range equal to 2 LSBs of DAC A.
The circuit is shown with a 2.5 V reference, but reference volt-
ages up to V
DD
may be used. The op amps indicated will allow a
rail-to-rail output swing.
Note that the AD5343 has only a single reference input. If using
the AD5332, AD5333, or AD5342, both reference inputs must
be connected.
GND
V
DD
= 5V
EXT
REF
AD780/REF192
WITH V
DD
= 5V
V
IN
V
OUT
R2
51.2k
V
OUT
+5V
0.1F
0.1F10F
AD5332/AD5333/
AD5342/AD5343
GND
V
REF
A*
V
DD
V
OUT
A
R1
390
V
REF
B*
*NOT AD5343
V
OUT
B
R4
390
R3
51.2k
Figure 39. Coarse and Fine Adjustment
Power Supply Bypassing and Grounding
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD5332/AD5333/AD5342/AD5343 is mounted should be
designed so that the analog and digital sections are separated,
and confined to certain areas of the board. If the device is in a
system where multiple devices require an AGND-to-DGND
connection, the connection should be made at one point only.
The star ground point should be established as closely as pos-
sible to the device. The AD5332/AD5333/AD5342/AD5343
should have ample supply bypassing of 10 µF in parallel with
0.1 µF on the supply located as close to the package as pos-
sible, ideally right up against the device. The 10 µF capacitors
are the tantalum bead type. The 0.1 µF capacitor should have
low Effective Series Resistance (ESR) and Effective Series Induc-
tance (ESI), like the common ceramic types that provide a low
impedance path to ground at high frequencies to handle tran-
sient currents due to internal logic switching.
The power supply lines of the device should use as large a trace
as possible to provide low impedance paths and reduce the effects
of glitches on the power supply line. Fast switching signals such
as clocks should be shielded with digital ground to avoid radiat-
ing noise to other parts of the board, and should never be run
near the reference inputs. Avoid crossover of digital and ana-
log signals. Traces on opposite sides of the board should run
at right angles to each other. This reduces the effects of feed-
through through the board. A microstrip technique is by far
the best, but not always possible with a double-sided board. In
this technique, the component side of the board is dedicated to
ground plane while signal traces are placed on the solder side.