Datasheet
AD5306/AD5316/AD5326
Rev. F | Page 22 of 24
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD5306/AD5316/AD5326 is mounted should be designed so
the analog and digital sections are separated and confined to
certain areas of the board.
If the AD5306/AD5316/AD5326 is in a system where multiple
devices require an AGND-to-DGND connection, the connection
should be made at one point only. The star ground point should
be established as close as possible to the device. The AD5306/
AD5316/AD5326 should have ample supply bypassing of 10 μF
in parallel with 0.1 μF on the supply located as close to the
package as possible, ideally right up against the device. The 10 μF
capacitors are the tantalum bead type. The 0.1 μF capacitor should
have low effective series resistance (ESR) and low effective
series inductance (ESI), like the common ceramic types that
provide a low impedance path to ground at high frequencies to
handle transient currents due to internal logic switching.
The power supply lines of the AD5306/AD5316/AD5326 should
use as large a trace as possible to provide low impedance paths
and reduce the effects of glitches on the power supply line.
Components with fast-switching signals, such as clocks, should
be shielded with digital ground to avoid radiating noise to other
parts of the board, and they should never be run near the
reference inputs. A ground line routed between the SDA and
SCL lines helps to reduce crosstalk between them. Although a
ground line is not required on a multilayer board because there is
a separate ground plane, separating the lines helps.
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
reduces the effects of feedthrough through the board. A micro-
strip technique is the best method, but its use is not always
possible with a double-sided board. In this technique, the
component side of the board is dedicated to ground plane while
signal traces are placed on the solder side.
Table 8. Overview of AD53xx Serial Devices
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Part No. Resolution No. of DACs DNL Interface Settling Time (μs) Package Pins
SINGLES
AD5300 8 1 ±0.25 SPI 4 SOT-23, MSOP 6, 8
AD5310 10 1 ±0.5 SPI 6 SOT-23, MSOP 6, 8
AD5320 12 1 ±1.0 SPI 8 SOT-23, MSOP 6, 8
AD5301 8 1 ±0.25 2-wire 6 SOT-23, MSOP 6, 8
AD5311 10 1 ±0.5 2-wire 7 SOT-23, MSOP 6, 8
AD5321 12 1 ±1.0 2-wire 8 SOT-23, MSOP 6, 8
DUALS
AD5302 8 2 ±0.25 SPI 6 MSOP 8
AD5312 10 2 ±0.5 SPI 7 MSOP 8
AD5322 12 2 ±1.0 SPI 8 MSOP 8
AD5303 8 2 ±0.25 SPI 6 TSSOP 16
AD5313 10 2 ±0.5 SPI 7 TSSOP 16
AD5323 12 2 ±1.0 SPI 8 TSSOP 16
QUADS
AD5304 8 4 ±0.25 SPI 6 MSOP 10
AD5314 10 4 ±0.5 SPI 7 MSOP 10
AD5324 12 4 ±1.0 SPI 8 MSOP 10
AD5305 8 4 ±0.25 2-Wire 6 MSOP 10
AD5315 10 4 ±0.5 2-Wire 7 MSOP 10
AD5325 12 4 ±1.0 2-Wire 8 MSOP 10
AD5306 8 4 ±0.25 2-Wire 6 TSSOP 16
AD5316 10 4 ±0.5 2-Wire 7 TSSOP 16
AD5326 12 4 ±1.0 2-Wire 8 TSSOP 16
AD5307 8 4 ±0.25 SPI 6 TSSOP 16
AD5317 10 4 ±0.5 SPI 7 TSSOP 16
AD5327 12 4 ±1.0 SPI 8 TSSOP 16
OCTALS
AD5308 8 8 ±0.25 SPI 6 TSSOP 16
AD5318 10 8 ±0.5 SPI 7 TSSOP 16
AD5328 12 8 ±1.0 SPI 8 TSSOP 16
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