Datasheet

AD5306/AD5316/AD5326
Rev. F | Page 18 of 24
WRITE OPERATION
When writing to the AD5306/AD5316/AD5326 DACs, the user
must begin with an address byte (R/
W
= 0), after which the DAC
acknowledges that it is prepared to receive data by pulling SDA
low. This address byte is followed by the pointer byte, which is
also acknowledged by the DAC. Two bytes of data are then
written to the DAC, as shown in
Figure 33. A stop condition
follows.
READ OPERATION
When reading data back from the AD5306/AD5316/AD5326
DACs, the user begins with an address byte (R/
W
= 0), after
which the DAC acknowledges that it is prepared to receive data
by pulling SDA low. This address byte is usually followed by the
pointer byte, which is also acknowledged by the DAC. Following
this, there is a repeated start condition by the master, and the
address is resent with R/
W
= 1. This is acknowledged by the
DAC, indicating that it is prepared to transmit data. Two bytes
of data are then read from the DAC, as shown in
Figure 34. A
stop condition follows.
A1 X LSBXR/WA00
LEAST SIGNIFICANT DATA BYTEMOST SIGNIFICANT DATA BYTE
00 11
ACK
BY
AD53x6
ACK
BY
AD53x6
ACK
BY
AD53x6
ACK
BY
AD533x
MSB
ADDRESS BYTE POINTER BYTE
START
CONDITION
BY
MASTER
STOP
CONDITION
BY
MASTER
SCL
SDA
SCL
SDA
MSB LSB MSB LSB
02066-033
Figure 33. Write Sequence
02066-034
DATA BYTE
LEAST SIGNIFICANT DATA BYTE
SCL
SDA
MSB
SCL
SDA
MSB
ADDRESS BYTE
SCL
SDA
MSB LSB
POINTER BYTEADDRESS BYTE
LSB
ACK
BY
AD53x6
ACK
BY
AD53x6
ACK
BY
AD53x6
ACK
BY
MASTER
START
CONDITION
BY
MASTER
REPEATED
START
CONDITION
BY
MASTER
NO
ACK
BY
MASTER
STOP
CONDITION
BY
MASTER
XX
R/W000 11
A1 R/WA0
A1 A0
00 0 11
LSB
Figure 34. Readback Sequence