Datasheet

AD5303/AD5313/AD5323
Rev. B | Page 7 of 28
2mA I
OL
2mA I
OH
1.6V
TO OUTPUT
PIN
C
L
50pF
00472-002
Figure 4. Load Circuit for Digital Output (SDO) Timing Specifications
SCLK
S
YNC
DIN* DB15
DB0
LDAC
LDAC
CLR
*
SEE THE INPUT SHIFT REGISTER SECTION.
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
00472-003
Figure 5. Serial Interface Timing Diagram