Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- GENERAL DESCRIPTION
- FUNCTIONAL BLOCK DIAGRAM
- TABLE OF CONTENTS
- REVISION HISTORY
- SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
- TERMINOLOGY
- TYPICAL PERFORMANCE CHARACTERISTICS
- FUNCTIONAL DESCRIPTION
- POWER-ON RESET
- SERIAL INTERFACE
- POWER-DOWN MODES
- MICROPROCESSER INTERFACING
- APPLICATIONS INFORMATION
- TYPICAL APPLICATION CIRCUIT
- BIPOLAR OPERATION USING THE AD5303/ AD5313/AD5323
- OPTO-ISOLATED INTERFACE FOR PROCESS CONTROL APPLICATIONS
- DECODING MULTIPLE AD5303/AD5313/AD5323s
- AD5303/AD5313/AD5323 AS A DIGITALLY PROGRAMMABLE WINDOW DETECTOR
- COARSE AND FINE ADJUSTMENT USING THE AD5303/AD5313/AD5323
- DAISY-CHAIN MODE
- POWER SUPPLY BYPASSING AND GROUNDING
- OUTLINE DIMENSIONS

AD5303/AD5313/AD5323
Rev. B | Page 16 of 28
POWER-ON RESET
The AD5303/AD5313/AD5323 are provided with a power-on
reset function, so that they power up in a defined state. The
power-on state is with 0V to V
REF
output range and the output
set to 0 V.
Both input and DAC registers are filled with zeros and remain
so until a valid write sequence is made to the device. This is
particularly useful in applications where it is important to know
the state of the DAC outputs while the device is powering up.
CLEAR FUNCTION (CLR)
The
CLR
pin is an active low input that, when pulled low, loads
all zeros to both input registers and both DAC registers. This
enables both analog outputs to be cleared to 0 V.