Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- GENERAL DESCRIPTION
- FUNCTIONAL BLOCK DIAGRAM
- TABLE OF CONTENTS
- REVISION HISTORY
- SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
- TERMINOLOGY
- TYPICAL PERFORMANCE CHARACTERISTICS
- FUNCTIONAL DESCRIPTION
- POWER-ON RESET
- SERIAL INTERFACE
- POWER-DOWN MODES
- MICROPROCESSER INTERFACING
- APPLICATIONS INFORMATION
- TYPICAL APPLICATION CIRCUIT
- BIPOLAR OPERATION USING THE AD5303/ AD5313/AD5323
- OPTO-ISOLATED INTERFACE FOR PROCESS CONTROL APPLICATIONS
- DECODING MULTIPLE AD5303/AD5313/AD5323s
- AD5303/AD5313/AD5323 AS A DIGITALLY PROGRAMMABLE WINDOW DETECTOR
- COARSE AND FINE ADJUSTMENT USING THE AD5303/AD5313/AD5323
- DAISY-CHAIN MODE
- POWER SUPPLY BYPASSING AND GROUNDING
- OUTLINE DIMENSIONS

AD5303/AD5313/AD5323
Rev. B | Page 14 of 28
2.48
2.47
00472-025
V
OUT
(V)
2.49
2.50
1µs/DIV
00472-027
2mV/DI
V
500ns/DIV
Figure 27. DAC-to-DAC Crosstalk
Figure 25. AD5323 Major-Code Transition
–60
–50
–40
–30
–20
–10
0
10
10 100 1k 10k 100k 1M 10M
00472-026
(dB)
FREQUENCY(Hz)
–0.10
–0.05
0
0.05
0.10
012345
00472-028
FULL-SCALE ERROR (V)
V
REF
(V)
T
A
= 25°C
V
DD
= 5V
Figure 28. Full-Scale Error vs. V
REF
(Buffered)
Figure 26. Multiplying Bandwidth (Small-Signal Frequency Response)