Datasheet

AD5301/AD5311/AD5321
Rev. B | Page 15 of 24
WRITE OPERATION
When writing to the AD5301/AD5311/AD5321 DACs, the
user must begin with an address byte, after which the DAC
acknowledges that it is prepared to receive data by pulling
SDA low. This address byte is followed by the 16-bit word in the
form of two control bytes. The write operations for the three
DACs are shown in
Figure 29 to Figure 31.
SCL
S
D
A
SCL
S
D
A
LEAST SIGNIFICANT CONTROL BYTE
ACK
BY
AD5301
ACK
BY
AD5301
START
COND
BY
MASTER
*THIS BIT MUST BE 0 IN THE 6-LEAD SOT-23 VERSION.
ACK
BY
AD5301
STOP
COND
BY
MASTER
PD1XX PD0 D7 D6 D5 D4
MOST SIGNIFICANT CONTROL BYTEADDRESS BYTE
0A1*A00011
R/W
D3 D2 D1 D0 X X X X
0
0927-027
Figure 29. AD5301 Write Sequence
SCL
SD
A
SCL
SD
A
LEAST SIGNIFICANT CONTROL BYTE
ACK
BY
AD5311
ACK
BY
AD5311
START
COND
BY
MASTER
*THIS BIT MUST BE 0 IN THE 6-LEAD SOT-23 VERSION.
ACK
BY
AD5311
STOP
COND
BY
MASTER
PD1XX PD0 D9 D8 D7 D6
MOST SIGNIFICANT CONTROL BYTEADDRESS BYTE
0A1*A00011
R/W
D5 D4 D3 D2 D1 D0 X X
00927-028
Figure 30. AD5311 Write Sequence
SCL
SDA
SCL
SDA
LEAST SIGNIFICANT CONTROL BYTE
ACK
BY
AD5321
ACK
BY
AD5321
START
COND
BY
MASTER
*THIS BIT MUST BE 0 IN THE 6-LEAD SOT-23 VERSION.
ACK
BY
AD5321
STOP
COND
BY
MASTER
PD1XX PD0 D11 D10 D9 D8
MOST SIGNIFICANT CONTROL BYTEADDRESS BYTE
0A1*A00011
R/W
D7 D6 D5 D4 D3 D2 D1 D0
00927-029
Figure 31. AD5321 Write Sequence