Datasheet

AD5301/AD5311/AD5321
Rev. B | Page 11 of 24
I
DD
(µA)
V
DD
(V)
1.0
2.7 3.2 3.7 4.2 4.7 5.2
0.8
0.6
0.4
0.2
0
+25°C
–40°C
+105°C
00927-017
Figure 17. Power-Down Current vs. Supply Voltage
I
DD
(µA)
V
LOGIC
(V)
300
0 1.0 2.0 3.0 4.0 5.0
250
200
150
100
50
0
DECREASING
T
A
= 25°C
V
DD
= 5V
V
DD
= 3V
INCREASING
00927-018
Figure 18. Supply Current vs. Logic Input Voltage for SDA and SCL Voltage
Increasing and Decreasing
CH1 1V, TIME BASE = 5µs/DIV
1
V
DD
= 5V
T
A
= 25°C
LOAD = 2kΩ AND
200pF TO GND
V
OUT
00927-019
Figure 19. Half-Scale Settling (1/4 to 3/4 Scale Code Charge)
CH2
CH1 1V, CH2 1V, TIME BASE = 20µs/DIV
CH1
V
OUT
T
A
= 25°C
V
DD
00927-020
Figure 20. Power-On Reset to 0 V