Datasheet

AD5320
Rev. C | Page 10 of 20
T
A
= 25°C
V
DD
= 5V
V
LOGIC
(V)
I
DD
(µA)
800
600
400
200
0
054321
00934-017
V
DD
= 3V
Figure 17. Supply Current vs. Logic Input Voltage
V
OUT
CLK
CH1 1V, CH2 5V, TIME BASE = 1µs/DIV
CH2
CH1
00934-018
V
DD
= 5V
FULL-SCALE CODE CHANGE
000 HEX – FFF HEX
T
A
= 25°C
OUTPUT LOADED WITH
2kΩ AND 200pF TO GND
Figure 18. Full-Scale Settling Time
V
OUT
CLK
CH1 1V, CH2 5V, TIME BASE = 1µs/DIV
00934-019
C
H1
C
H2
V
DD
= 5V
HALF-SCALE CODE CHANGE
400 HEX – C00 HEX
T
A
= 25°C
OUTPUT LOADED WITH
2kΩ AND 200pF TO GND
Figure 19. Half-Scale Settling Time
CH1
CH2
CH1 1V, CH 2 1V, TIME BASE = 20µs/DIV
00934-020
2kΩ LOAD TO V
DD
V
DD
V
OUT
Figure 20. Power-On Reset to 0 V
CH1 1V, CH2 5V, TIME BASE = 5µs/DIV
00934-021
CH2
CH1
CLK
V
OUT
V
DD
= 5V
Figure 21. Exiting Power-Down (800 Hex Loaded)
LOADED WITH 2kΩ
AND 200pF TO GND
CODE CHANGE:
800 HEX TO 7FF HEX
500ns/DIV
V
OUT
(V)
00934-022
2.54
2.52
2.50
2.48
2.46
2.56
Figure 22. Digital-to-Analog Glitch Impulse