Datasheet

AD5307/AD5317/AD5327
Rev. C | Page 16 of 28
OUTPUT AMPLIFIER
The output buffer amplifier is capable of generating output
voltages to within 1 mV of either rail. Its actual range depends
on the value of V
REF
, GAIN, offset error, and gain error.
If a gain of 1 is selected (GAIN = 0), the output range is 0.001 V
to V
REF
.
If a gain of 2 is selected (GAIN = 1), the output range is 0.001 V
to 2 V
REF
. Because of clamping, however, the maximum output
is limited to V
DD
− 0.001 V.
The output amplifier is capable of driving a load of 2 k to GND
or V
DD
in parallel with 500 pF to GND or V
DD
. The source and
sink capabilities of the output amplifier can be seen in
Figure 16.
The slew rate is 0.7 V/s, with a half-scale settling time to
±0.5 LSB (at eight bits) of 6 s.
POWER-ON RESET
The AD5307/AD5317/AD5327 are each provided with a power-
on reset function so that they power up in a defined state. The
power-on state is
• Normal operation
• Reference inputs unbuffered
• 0 V to V
REF
output range
• Output voltage set to 0 V
Both input and DAC registers are filled with 0s until a valid
write sequence is made to the device. This is particularly useful
in applications where it is important to know the state of the
DAC outputs while the device is powering up.