Datasheet

AD5302/AD5312/AD5322
Rev. D | Page 12 of 24
600
400
300
100
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
00928-018
I
DD
(µA)
200
500
V
DD
(V)
BOTH DACS IN GAIN-OF-TWO MODE
REFERENCE INPUTS BUFFERED
+105°C
+25°C
–40°C
Figure 18. Supply Current vs. Supply Voltage
0.8
0.6
0.2
0
2.7 3.2 3.7 4.2 4.7 5.2
00928-019
I
DD
(µA)
0.4
1.0
V
DD
(V)
+105°C
+25°C
–40°C
BOTH DACS IN
THREE-STATE CONDITION
Figure 19. Power-Down Current vs. Supply Voltage
500
400
200
100
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
00928-020
I
DD
(µA)
300
700
V
LOGIC
(V)
T
A
= 25°C
V
DD
= 5V
V
DD
= 3V
600
Figure 20. Supply vs. Logic Input Voltage
CH2
CH1 1V, CH2 5V, TIME BASE = 5µs/DIV
00928-021
CH1
V
DD
= 5V
T
A
= 25°C
CLK
V
OUT
Figure 21. Half-Scale Setting (¼ to ¾ Scale Code Change)
CH2
CH1 1V, CH2 1V, TIME BASE = 20µs/DIV
00928-022
CH1
V
OUT
A
T
A
= 25°C
V
DD
Figure 22. Power-On Reset to 0 V
C
H3
CH1 1V, CH3 5V, TIME BASE = 1µs/DIV
00928-023
C
H1
T
A
= 25°C
V
OUT
CLK
Figure 23. Existing Power-Down to Midscale