Datasheet

Data Sheet AD5291/AD5292
THEORY OF OPERATION
analog.com Rev. G | 27 of 33
SHUTDOWN MODE
The AD5291/AD5292 can be placed in shutdown mode by execut-
ing the software shutdown command, Command 8 (see Table 11),
and setting the LSB, D0, to 1. This feature places the RDAC in a
special state in which Terminal A is open-circuited, and Wiper W
is connected to Terminal B. The contents of the RDAC register are
unchanged by entering shutdown mode. However, all commands
listed in Table 11 are supported while in shutdown mode. Execute
Command 8 (see Table 11), and set the LSB, D0, to 0 to exit
shutdown mode.
RESISTOR PERFORMANCE MODE
This mode activates a new, patented 1% end-to-end resistor toler-
ance that ensures a ±1% resistor tolerance on each code, that is,
code = half scale, R
WB
= 10 kΩ ± 100 Ω. See Table 2 (AD5291)
or Table 5 (AD5292) to check which codes achieve ±1% resistor
tolerance. The resistor performance mode is activated by program-
ming Bit C2 of the control register (see Table 12 and Table 13). The
typical settling time is shown in Figure 50.
RESET
A low-to-high transition of the hardware RESET pin loads the
RDAC register with the contents of the most recently programmed
20-TP memory location. The AD5291/AD5292 can also be reset
through software by executing Command 4 (see Table 11). If no
20-TP memory location is programmed, then the RDAC register
loads with midscale upon reset. The control register is restored with
default bits; see Table 13.
SDO PIN AND DAISY-CHAIN OPERATION
The serial data output pin (SDO) serves two purposes: it can be
used to read the contents of the wiper setting, 50-TP values and
control register using Command 2, Command 5 and Command
7, respectively (see Table 11) or the SDO pin can be used in
daisy-chain mode. Data is clocked out of SDO on the rising edge
of SCLK. The SDO pin contains an open-drain N-channel FET that
requires a pull-up resistor if this pin is used. To place the pin in
high impedance and minimize the power dissipation when the pin
is used, the 0x8001 data word followed by Command 0 should
be sent to the part. Table 17 provides a sample listing for the
sequence of the serial data input (DIN). Daisy chaining minimizes
the number of port pins required from the controlling IC. As shown
in Figure 64, users need to tie the SDO pin of one package to
the DIN pin of the next package. Users may need to increase
the clock period, because the pull-up resistor and the capacitive
loading at the SDO-to-DIN interface may require additional time
delay between subsequent devices.
When two AD5291 and AD5292 devices are daisy-chained, 32 bits
of data are required. The first 16 bits go to U2, and the second 16
bits go to U1. Hold the SYNC pin low until all 32 bits are clocked
into their respective shift registers. The SYNC pin is then pulled
high to complete the operation.
Keep the SYNC pin low until all 32 bits are clocked into their
respective serial registers. The SYNC pin is then pulled high to
complete the operation.
DIN SDO
SCLK SCLK
R
P
2.2kΩ
DIN SDO
U1 U2
AD5291/
AD5292
AD5291/
AD5292
SYNC
V
LOGIC
MICRO-
CONTROLLER
SCLK SS
MOSI
SYNC
07674-050
Figure 64. Daisy-Chain Configuration Using SDO
Table 17. Minimize Power Dissipation at SDO Pin
DIN
1
SDO
1
Action
0xXXXX 0xXXXX Last user command sent to the digipot
0x8001 0xXXXX Prepares the SDO pin to be placed in high impedance mode
0x0000 High impedance The SDO pin is placed in high impedance
1
X is don’t care.