Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Test Circuits
- Theory of Operation
- Serial Data Interface
- Shift Register
- RDAC Register
- 20-TP Memory
- Write Protection
- Basic Operation
- 20-TP Readback and Spare Memory Status
- Shutdown Mode
- Resistor Performance Mode
- Reset
- SDO Pin and Daisy-Chain Operation
- RDAC Architecture
- Programming the Variable Resistor
- Programming the Potentiometer Divider
- EXT_CAP Capacitor
- Terminal Voltage Operating Range
- Applications Information
- Outline Dimensions
Data Sheet AD5291/AD5292
ABSOLUTE MAXIMUM RATINGS
analog.com Rev. G | 11 of 33
T
A
= 25°C, unless otherwise noted.
Table 8.
Parameter Rating
V
DD
to GND −0.3 V to +35 V
V
SS
to GND +0.3 V to − 25 V
V
LOGIC
to GND −0.3 V to + 7 V
V
DD
to V
SS
35 V
V
A
, V
B
, V
W
to GND V
SS
− 0.3 V, V
DD
+ 0.3 V
Digital Input and Output Voltage to GND −0.3 V to V
LOGIC
+ 0.3 V
EXT_CAP Voltage to GND −0.3 V to +7 V
I
A
, I
B
, I
W
Continuous
R
AB
= 20 kΩ ±3 mA
R
AB
= 50 kΩ, 100 kΩ ±2 mA
Pulsed
1
Frequency > 10 kHz MCC
2
/d
3
Frequency ≤ 10 kHz MCC
2
/√d
3
Operating Temperature Range
4
−40°C to +105°C
Maximum Junction Temperature (T
J
max) 150°C
Storage Temperature Range −65°C to +150°C
Reflow Soldering
Peak Temperature 260°C
Time at Peak Temperature 20 sec to 40 sec
Package Power Dissipation (T
J
max − T
A
)/θ
JA
1
Maximum terminal current is bounded by the maximum current handling of the
switches, maximum power dissipation of the package, and maximum applied
voltage across any two of the A, B, and W terminals at a given resistance.
2
Maximum continuous current.
3
Pulse duty factor.
4
Includes programming of OTP memory.
Stresses at or above those listed under Absolute Maximum Ratings
may cause permanent damage to the product. This is a stress
rating only; functional operation of the product at these or any other
conditions above those indicated in the operational section of this
specification is not implied. Operation beyond the maximum operat-
ing conditions for extended periods may affect product reliability.
THERMAL RESISTANCE
θ
JA
is defined by JEDEC specification JESD-51 and the value is
dependent on the test board and test environment.
Table 9. Thermal Resistance
Package Type θ
JA
θ
JC
Unit
14-Lead TSSOP 93
1
20 °C/W
1
JEDEC 2S2P test board, still air (0 m/sec to 1 m/sec airflow).
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Charged devi-
ces and circuit boards can discharge without detection. Although
this product features patented or proprietary protection circuitry,
damage may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to avoid
performance degradation or loss of functionality.