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Data Sheet

AD5291/AD5292

256-/1024-Position, Digital Potentiometers with Maximum ±1% R-Tolerance Error

and 20-TP Memory

Rev. G

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FEATURES

► Single-channel, 256-/1024-position resolution

► 20 kΩ, 50 kΩ, and 100 kΩ nominal resistance

► Maximum ±1% nominal resistor tolerance error (resistor perform-

ance mode)

► 20-times programmable wiper memory

► Rheostat mode temperature coefficient: 35 ppm/°C

► Voltage divider temperature coefficient: 5 ppm/°C

► +9 V to +33 V single-supply operation

► ±9 V to ±16.5 V dual-supply operation

► SPI-compatible serial interface

► Wiper setting readback

► Power-on refreshed from 20-TP memory

APPLICATIONS

► Mechanical potentiometer replacement

► Instrumentation: gain and offset adjustment

► Programmable voltage-to-current conversion

► Programmable filters, delays, and time constants

► Programmable power supply

► Low resolution DAC replacement

► Sensor calibration

FUNCTIONAL BLOCK DIAGRAM

RDAC

DATA

SERIAL

INTERFACE

SYNC

SCLK

DIN

POWER-ON

RESET

OTP

MEMORY

BLOCK

LOGIC

SDO

EXT_CAP

GND

AD5291/

AD5292

RESET

RDY

07674-001

Figure 1.

GENERAL DESCRIPTION

The AD5291/AD5292 are single-channel, 256-/1024-position digital

potentiometers that combine industry leading variable resistor per-

formance with nonvolatile memory (NVM) in a compact package.

These devices are capable of operating across a wide voltage

range, supporting both dual supply operation at ±10.5 V to ±16.5 V

and single supply operation at +21 V to +33 V, while ensuring less

than 1% end-to-end resistor tolerance error and offering 20-time

programmable (20-TP) memory.

The guaranteed industry leading low resistor tolerance error feature

simplifies open-loop applications as well as precision calibration

and tolerance matching applications.

The AD5291/AD5292 device wiper settings are controllable through

the SPI digital interface. Unlimited adjustments are allowed before

programming the resistance value into the 20-TP memory. The

AD5291/AD5292 do not require any external voltage supply to

facilitate fuse blow, and there are 20 opportunities for permanent

programming. During 20-TP activation, a permanent blow fuse

command freezes the wiper position (analogous to placing epoxy

on a mechanical trimmer).

The AD5291/AD5292 are available in a compact 14-lead TSSOP

package. The part is guaranteed to operate over the extended

industrial temperature range of −40°C to +105°C. In this data sheet,

the digital potentiometer and RDAC terms are used interchangea-

bly.

Summary of content (33 pages)

PAGE 1
Data Sheet AD5291/AD5292 256-/1024-Position, Digital Potentiometers with Maximum ±1% R-Tolerance Error and 20-TP Memory ► ► ► ► ► ► ► ► ► ► ► FUNCTIONAL BLOCK DIAGRAM Single-channel, 256-/1024-position resolution 20 kΩ, 50 kΩ, and 100 kΩ nominal resistance Maximum ±1% nominal resistor tolerance error (resistor performance mode) 20-times programmable wiper memory Rheostat mode temperature coefficient: 35 ppm/°C Voltage divider temperature coefficient: 5 ppm/°C +9 V to +33 V single-supply operation ±9 V to
PAGE 2
Data Sheet AD5291/AD5292 TABLE OF CONTENTS Features................................................................ 1 Applications........................................................... 1 Functional Block Diagram......................................1 General Description...............................................1 Specifications........................................................ 3 Electrical Characteristics—AD5291................... 3 Electrical Characteristics—AD5292...................
PAGE 3
Data Sheet AD5291/AD5292 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—AD5291 VDD = 21 V to 33 V, VSS = 0 V; VDD = 10.5 V to 16.5 V, VSS = −10.5 V to −16.5 V; VLOGIC = 2.7 V to 5.5 V, VA = VDD, VB = VSS, −40°C < TA < +105°C, unless otherwise noted. Table 1.
PAGE 4
Data Sheet AD5291/AD5292 SPECIFICATIONS Table 1. Parameter Symbol Conditions RAB = 20 kΩ RAB = 50 kΩ RAB = 100 kΩ DYNAMIC CHARACTERISTICS5, 10 Bandwidth Total Harmonic Distortion VW Settling Time Resistor Noise Density BW THDW tS eN_WB −3 dB, code = half scale RAB = 20 kΩ RAB = 50 kΩ RAB = 100 kΩ VA = 1 V rms, VB = 0 V, f = 1 kHz RAB = 20 kΩ RAB = 50 kΩ RAB = 100 kΩ VA = 30 V, VB = 0 V, ±0.
PAGE 5
Data Sheet AD5291/AD5292 SPECIFICATIONS Resistor Performance Mode Code Range Table 2.
PAGE 6
Data Sheet AD5291/AD5292 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—AD5292 VDD = 21 V to 33 V, VSS = 0 V; VDD = 10.5 V to 16.5 V, VSS = −10.5 V to −16.5 V; VLOGIC = 2.7 V to 5.5 V, VA = VDD, VB = VSS, −40°C < TA < +105°C, unless otherwise noted. Table 4.
PAGE 7
Data Sheet AD5291/AD5292 SPECIFICATIONS Table 4. Parameter Power Supply Rejection Ratio6 DYNAMIC CHARACTERISTICS5, 10 Bandwidth Total Harmonic Distortion VW Settling Time Resistor Noise Density Symbol Conditions PSSR ∆VDD/∆VSS = ±15 V ± 10% RAB = 20 kΩ RAB = 50 kΩ RAB = 100 kΩ BW THDW tS eN_WB −3 dB, code = half scale RAB = 20 kΩ RAB = 50 kΩ RAB = 100 kΩ VA = 1 V rms, VB = 0 V, f = 1 kHz RAB = 20 kΩ RAB = 50 kΩ RAB = 100 kΩ VA = 30 V, VB = 0 V, ±0.
PAGE 8
Data Sheet AD5291/AD5292 SPECIFICATIONS Resistor Performance Mode Code Range Table 5.
PAGE 9
Data Sheet AD5291/AD5292 SPECIFICATIONS INTERFACE TIMING SPECIFICATIONS VDD/VSS = ±15 V, VLOGIC = 2.7 V to 5.5 V, −40°C < TA < +105°C. All specifications TMIN to TMAX, unless otherwise noted. Table 7. Parameter Limit1 Unit Description t 12 t2 t3 t4 t5 t6 t7 t8 t9 t104 t114 t124 t124 t124 t124 t134 t134 t144 tRESET tPOWER-UP5 20 10 10 10 5 5 1 4003 14 1 40 2.4 410 8 1.5 450 1.
PAGE 10
Data Sheet AD5291/AD5292 SPECIFICATIONS t4 SCLK t2 t7 t1 t9 t3 t8 SYNC t5 t6 X X C3 C2 D7 D6 D2 D1 SDO D0 t11 t10 RDY t12 tRESET RESET 07674-004 DIN Figure 3. Write Timing Diagram, CPOL = 0, CPHA = 1 Figure 4. Read Timing Diagram, CPOL = 0, CPHA = 1 analog.com Rev.
PAGE 11
Data Sheet AD5291/AD5292 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 8.
PAGE 12
Data Sheet AD5291/AD5292 RESET 1 14 RDY 13 SDO 12 11 SYNC SCLK 10 DIN VDD 6 9 GND EXT_CAP 7 8 VLOGIC VSS 2 A 3 W 4 B 5 AD5291/ AD5292 TOP VIEW Not to Scale 07674-006 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 5. Pin Configuration Table 10. Pin Function Descriptions Pin No. Mnemonic Description 1 RESET 2 VSS 3 4 5 6 7 8 9 10 A W B VDD EXT_CAP VLOGIC GND DIN 11 SCLK 12 SYNC 13 SDO 14 RDY Hardware Reset Pin.
PAGE 13
Data Sheet AD5291/AD5292 TYPICAL PERFORMANCE CHARACTERISTICS 1.0 0.6 0.4 0.2 0.2 0 –0.2 –0.4 –0.6 –0.6 –0.8 RAB = 20kΩ 256 384 512 640 768 896 1023 CODE (Decimal) Figure 6. R-INL in R-Perf Mode vs. Code vs. Temperature (AD5292) 0.6 –1.0 0 640 768 896 1023 TEMPERATURE = 25°C 0.4 0.3 0.3 DNL (LSB) 0.4 0.2 0.1 0.2 0.1 0 0 –0.1 –0.1 –0.2 20kΩ 50kΩ 100kΩ –0.2 384 512 640 768 896 1023 –0.3 07674-007 256 +105°C +25°C –40°C CODE (Decimal) Figure 7.
PAGE 14
Data Sheet AD5291/AD5292 TYPICAL PERFORMANCE CHARACTERISTICS 0.15 20kΩ 50kΩ 100kΩ 0.10 0.05 0.05 DNL (LSB) 0.10 –0.05 –0.05 –0.10 –0.15 –0.15 128 256 +105°C +25°C –40°C 0 384 512 640 768 896 1023 CODE (Decimal) Figure 12. R-DNL in Normal Mode vs. Code vs. Temperature (AD5292) –0.20 128 256 384 512 0.5 0.2 INL (LSB) 0.6 –0.2 –1.0 –0.6 128 256 384 512 640 768 896 1023 CODE (Decimal) –0.
PAGE 15
Data Sheet AD5291/AD5292 TYPICAL PERFORMANCE CHARACTERISTICS 0.6 0.4 0.2 0.2 INL (LSB) 0.4 0 –0.2 –0.4 –0.4 –0.6 –0.6 0 128 256 384 512 640 768 896 1023 CODE (Decimal) –0.8 640 768 896 1023 20kΩ 50kΩ 100kΩ DNL (LSB) –0.04 –0.10 –0.08 –0.15 –0.12 256 384 512 640 768 896 1023 Figure 19. DNL in Normal Mode vs. Code vs. Temperature (AD5292) 0.30 0 0.30 0.20 0.20 0.15 0.15 0.10 0.10 INL (LSB) 0.25 0 –0.05 –0.
PAGE 16
Data Sheet AD5291/AD5292 TYPICAL PERFORMANCE CHARACTERISTICS 0.14 RAB = 20kΩ TEMPERATURE = 25°C 0.12 0.12 0.10 0.10 0.08 0.08 0.06 0.06 0.04 0.02 0.02 0 0 –0.02 –0.02 –0.04 20kΩ 50kΩ 100kΩ –0.04 0 32 64 +105°C +25°C –40°C 96 128 160 192 224 255 CODE (Decimal) Figure 24. R-DNL in R-Perf Mode vs. Code vs. Temperature (AD5291) 0.25 0 32 0.20 0.15 0.15 INL (LSB) 0.20 0.05 96 128 160 192 224 255 Figure 27. R-DNL in R-Perf Mode vs. Code vs.
PAGE 17
Data Sheet AD5291/AD5292 TYPICAL PERFORMANCE CHARACTERISTICS 0.25 0.15 0.15 0.10 0.10 0.05 0.05 INL (LSB) 0.20 0 –0.05 –0.10 –0.15 –0.15 32 64 96 128 160 192 224 255 CODE (Decimal) 0.08 0.08 0.06 0.06 DNL (LSB) 0.10 0.04 0.02 0 –0.02 96 128 160 192 224 255 CODE (Decimal) Figure 31. DNL in R-Perf Mode vs. Code vs. Temperature (AD5291) 0.20 –0.06 0.10 0.05 0.05 INL (LSB) 0.10 0 –0.10 –0.10 –0.15 –0.15 96 128 160 CODE (Decimal) 192 224 256 07674-020 –0.
PAGE 18
Data Sheet AD5291/AD5292 TYPICAL PERFORMANCE CHARACTERISTICS 0.03 +105°C +25°C –40°C TEMPERATURE = 25°C 0.02 0.02 0.01 0.01 0 0 DNL (LSB) –0.01 –0.02 –0.04 RAB = 20kΩ 32 64 96 128 160 192 224 255 CODE (Decimal) Figure 36. DNL in Normal Mode vs. Code vs. Temperature (AD5291) 450 250 200 150 IDD 128 10 20 30 40 50 60 70 80 90 100 TEMPERATURE (°C) 224 255 VDD = ±15V 0.16 0.14 0.12 0.1 0.08 0.06 0.04 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.
PAGE 19
Data Sheet AD5291/AD5292 TYPICAL PERFORMANCE CHARACTERISTICS 0 0x200 (0x80) –10 0x100 (0x40) 0x080 (0x20) –20 0x040 (0x10) 0x040 (0x10) –25 0x020 ( 0x08) –30 –30 0x010 (0x04) –40 0x008 (0x02) 0x010 (0x04) 0x004 (0x01) 0x008 (0x02) –50 0x004 (0x01) –60 0x001 –40 0x002 –50 10 0x002 0x001 100 1k 10k 100k 1M FREQUENCY (Hz) –70 10 07674-025 –45 0x020 ( 0x08) 0 –10 –10 0x100 (0x40) 0x080 (0x20) –20 10k 100k 1M Figure 45. 100 kΩ Gain vs. Frequency vs.
PAGE 20
Data Sheet AD5291/AD5292 TYPICAL PERFORMANCE CHARACTERISTICS 800,000 8 50k – 150pF 50k – 250pF 100k – 0pF 100k – 75pF 100k – 150pF 100k – 250pF 700,000 BANDWIDTH (Hz) VDD/VSS = 30V/0V VA = VDD VB = VSS 7 600,000 500,000 400,000 300,000 200,000 6 5 4 20kΩ 3 50kΩ 2 100kΩ 1 100,000 0 0 8 16 32 64 16 32 CODE (Decimal) 8 128 256 512 AD5292 128 AD5291 64 0 07674-222 0 0 0 256 64 768 192 1023 AD5292 255 AD5291 Figure 51. Theoretical Maximum Current vs. Code 35 1.2 30 1.
PAGE 21
Data Sheet AD5291/AD5292 TYPICAL PERFORMANCE CHARACTERISTICS NUMBER OF CODES (AD5291) 62.5 3 2 1 8.6 TIME (ms) 200 37.5 150 25.0 100 12.5 50 20.0 8 VDD/VSS = ±15V VLOGIC = +5V NUMBER OF CODES (AD5291) 17.5 6 3 2 Figure 55. VEXT_CAP Waveform While Writing Fuse analog.com 07674-037 17.2 16.0 14.8 13.6 12.4 TIME (ms) 11.2 8.8 10.0 7.6 6.4 5.2 4.0 2.8 1.6 0.4 –2.0 –2 –0.8 0 10 20 30 40 50 60 70 80 90 100 TEMPERATURE (°C) 0 Figure 56.
PAGE 22
Data Sheet AD5291/AD5292 TEST CIRCUITS Figure 58 to Figure 63 define the test conditions used in the Specifications section. VA IW VDD A V+ ~ V+ = VDD ± 10% ΔVMS PSRR (dB) = 20 log ΔV DD W B B 07674-041 NC = NO CONNECT 2.5V W B VMS +15V CODE = 0x00 W B + IWB – RW = –15V –15V NC RWB= VOUT Figure 62. Gain vs. Frequency Figure 59.
PAGE 23
Data Sheet AD5291/AD5292 THEORY OF OPERATION The AD5291/AD5292 digital potentiometers are designed to operate as true variable resistors for analog signals that remain within the terminal voltage range of VSS < VTERM < VDD. The patented ±1% resistor tolerance feature helps to minimize the total RDAC resistance error, which reduces the overall system error by offering better absolute matching and improved open-loop performance.
PAGE 24
Data Sheet AD5291/AD5292 THEORY OF OPERATION Table 12. Control Register Bit Map1 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 X X X X X X C3 C2 C1 C0 1 X = don’t care. Table 13.
PAGE 25
Data Sheet AD5291/AD5292 THEORY OF OPERATION RDAC REGISTER The RDAC register directly controls the position of the digital potentiometer wiper. For example, when the RDAC register is loaded with all zeros, the wiper is connected to Terminal B of the variable resistor. The RDAC register is a standard logic register; there is no restriction on the number of changes allowed.
PAGE 26
Data Sheet AD5291/AD5292 THEORY OF OPERATION WRITE PROTECTION On power-up, the shift register write commands for both the RDAC register and the 20-TP memory register are disabled. The RDAC write protect bit, C1 of the control register (see Table 12 and Table 13), is set to 0 by default.
PAGE 27
Data Sheet AD5291/AD5292 THEORY OF OPERATION SHUTDOWN MODE The AD5291/AD5292 can be placed in shutdown mode by executing the software shutdown command, Command 8 (see Table 11), and setting the LSB, D0, to 1. This feature places the RDAC in a special state in which Terminal A is open-circuited, and Wiper W is connected to Terminal B. The contents of the RDAC register are unchanged by entering shutdown mode. However, all commands listed in Table 11 are supported while in shutdown mode.
PAGE 28
Data Sheet AD5291/AD5292 THEORY OF OPERATION RDAC ARCHITECTURE To achieve optimum performance, Analog Devices has patented the RDAC segmentation architecture for all the digital potentiometers. In particular, the AD5291/AD5292 employ a three-stage segmentation approach, as shown in Figure 65. The AD5291/AD5292 wiper switches are designed with the transmission gate CMOS topology and with the gate voltages derived from VDD and VSS. A RM SW RM RW W RM RL AD5292: RWA D = RM RL 07674-051 B Figure 65.
PAGE 29
Data Sheet AD5291/AD5292 THEORY OF OPERATION equations defining the output voltage at VW with respect to ground for any valid input voltage applied to Terminal A and Terminal B are AD5292: VW D = D 256 × VA + D 1024 256 − D 256 × VA + × VB 1024 − D 1024 × VB (5) (6) If using the AD5291/AD5292 in voltage divider mode as shown in Figure 67, then the ±1% resistor tolerance calibration feature reduces the error when matching with discrete resistors.
PAGE 30
Data Sheet AD5291/AD5292 APPLICATIONS INFORMATION HIGH VOLTAGE DAC VDD U1 The AD5292 can be configured as a high voltage DAC, with output voltage as high as 33 V. The circuit is shown in Figure 70. The output is × 1.2 V × 1 + where D is the decimal code from 0 to 1023. R2 R1 U1B AD8512 VOUT 07674-153 R2 R3 ADG1207 Figure 70. High Voltage DAC +VIN4 VSS Figure 73. Data Acquisition System The gain can be calculated by using Equation 9. VOUT CC U2 SIGNAL G(D) = 1 + RBIAS IL Figure 71.
PAGE 31
Data Sheet AD5291/AD5292 APPLICATIONS INFORMATION In Figure 75, the lower trace shows that the volume level changes from a quarter-scale to full-scale when a signal change occurs near the zero-crossing window. V+ +15V U1A 1/2 AD8676 100kΩ VCC +3.3V 0V ±14V V– –15V R1 100kΩ ±0.1% R4 90.9kΩ ±0.1% +1.657V 0.0133V R2 806Ω ±0.1% +3.3V VCC ADCMP371 GND R6 27.4kΩ ±0.1% R7 33.2kΩ ±0.1% V– +3.3V U4 +1.643V V+ AD8541 AD5292 SERIAL INTERFACE U5A 1/2 7408 +3.3V U2 +1.81V A U3 +1.645V ±1.
PAGE 32
Data Sheet AD5291/AD5292 OUTLINE DIMENSIONS Figure 76.
PAGE 33
Data Sheet AD5291/AD5292 OUTLINE DIMENSIONS EVALUATION BOARDS Model1, 2 Description EVAL−AD5292DBZ Evaluation Board 1 Z = RoHS Compliant Part. 2 The EVAL−AD5292DBZ is also used to test the AD5291. ©2009-2022 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. One Analog Way, Wilmington, MA 01887-2356, U.S.A. Rev.