Datasheet

AD5290 Data Sheet
Rev. C | Page 4 of 20
Parameter Symbol Conditions Min Typ
1
Max Unit
DYNAMIC CHARACTERISTICS
6, 8, 9
Bandwidth −3 dB BW Code = 0x80 470 kHz
Total Harmonic Distortion THD
W
V
A
= 1 V rms, V
B
= 0 V, f = 1 kHz 0.006 %
V
W
Settling Time t
S
V
A
= 10 V, V
B
= 0 V, ±1 LSB error
band
4 µs
Resistor Noise Voltage e
N_WB
R
WB
= 5 kΩ, f = 1 kHz 9 nV/√Hz
1
Typical represents average reading at +25°C, V
DD
= +15 V, and V
SS
= −15 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from an ideal value measured between successive tap positions. Parts are guaranteed monotonic.
3
All parts have a 35 ppm/°C temperature coefficient.
4
INL and DNL are measured at V
W
with the RDAC configured as a potentiometer divider similar to a voltage output DAC. V
A
= V
DD
and V
B
= 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
5
Resistor Terminal A, Terminal B, and Terminal W have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test.
7
P
DISS
is calculated from (I
DD
× V
DD
) + abs (I
SS
× V
SS
). CMOS logic-level inputs result in minimum power dissipation.
8
Bandwidth, noise, and settling times are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest
bandwidth. The highest R value results in the minimum overall power consumption.
9
All dynamic characteristics use V
DD
= +15 V and V
SS
= −15 V.