Datasheet

Data Sheet AD5272/AD5274
Rev. D | Page 19 of 28
WRITE OPERATION
It is possible to write data for the RDAC register or the control
register. When writing to the AD5272/AD5274, the user must
begin with a start command followed by an address byte (R/
W
= 0), after which the AD5272/AD5274 acknowledges that it is
prepared to receive data by pulling SDA low.
Two bytes of data are then written to the RDAC, the most
significant byte followed by the least significant byte; both of
these data bytes are acknowledged by the AD5272/AD5274. A
stop condition follows. The write operations for the AD5272/
AD5274 are shown in Figure 43.
A repeated write function gives the user flexibility to update the
device a number of times after addressing the part only once, as
shown in Figure 44.
SCL
SDA
START BY
MASTER
ACK. BY
AD5272/AD5274
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
MOST SIGNIFICANT DATA BYTE
FRAME 3
LEAST SIGNIFICANT DATA BYTE
SCL (CONTINUED)
SDA (CONTINUED)
ACK. BY
AD5272/AD5274
ACK. BY
AD5272/AD5274
STOP BY
MASTER
0
19
1
99
91
1
011A1A0 00C3C2
C1 C0
D9 D8
D7 D6 D5 D4 D3 D2 D1 D0
R/W
0
8076-005
Figure 43. Write Command
0
8076-006
SCL
SDA
START BY
MASTER
FRAME 2
MOST SIGNIFICANT DATA BYTE
FRAME 1
SERIAL BUS ADDRESS BYTE
0
19
1
99
91
1
0 1 1 A1 A0 R/W 0 0 C3 C2 C1 C0 D9 D8
D7 D6 D5 D4 D3 D2 D1 D0
SCL (CONTINUED)
SDA (CONTINUED)
FRAME 3
LEAST SIGNIFICANT DATA BYTE
SCL (CONTINUED)
SDA (CONTINUED)
STOP BY
MASTER
1
99
D7 D6 D5 D4 D3 D2 D1 D0
(CONTINUED)
(CONTINUED)
FRAME 5
LEAST SIGNIFICANT DATA BYTE
199
0 0 C3C2C1C0D9D8
FRAME 4
MOST SIGNIFICANT DATA BYTE
SCL
SDA
ACK.
BY
AD52722/AD5274
ACK.
BY
AD52722/AD5274
ACK.
BY
AD52722/AD5274
ACK.
BY
AD52722/AD5274
ACK.
BY
AD52722/AD5274
Figure 44. Multiple Write