Datasheet

Data Sheet AD5270/AD5271
Rev. F | Page 19 of 24
RDAC AND 50-TP READ OPERATION
A serial data output SDO pin is available for readback of the
internal RDAC register or 50-TP memory contents. The
contents of the RDAC register can be read back through SDO
by using Command 2 (see Table 11). Data from the RDAC
register is clocked out of the SDO pin during the last 10 clocks
of the next SPI operation.
It is possible to read back the contents of any of the 50-TP
memory registers through SDO by using Command 5. The
lower six LSB bits, D0 to D5 of the data byte, select which
memory location is to be read back, as shown in Table 13.
Data from the selected memory location is clocked out of the
SDO pin during the next SPI operation. A binary encoded
version address of the most recently programmed wiper memory
location can be read back using Command 6 (see Table 11). This
can be used to monitor the spare memory status of the 50-TP
memory block.
Table 12 provides a sample listing for the sequence of serial data
input (DIN) words with the serial data output appearing at the
SDO pin in hexadecimal format for a write and read to both the
RDAC register and the 50-TP memory (Memory Location 20).
Table 11. Command Operation Truth Table
Command
Number
Command[DB13:DB10] Data[DB9:DB0]
1
Operation
C3 C2 C1 C0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 0 0 X X X X X X X X X X NOP: do nothing.
1 0 0 0 1 D9 D8 D7 D6 D5 D4 D3 D2 D1
2
D0
2
Write contents of serial register
data to RDAC.
2 0 0 1 0 X X X X X X X X X X Read contents of RDAC wiper
register.
3 0 0 1 1 X X X X X X X X X X Store wiper setting: store RDAC
setting to 50-T P.
4 0 1 0 0 X X X X X X X X X X Software reset: refresh RDAC with
last 50-TP memory stored value.
5
3
0 1 0 1 X X X X D5 D4 D3 D2 D1 D0 Read contents of 50-TP from SDO
output in the next frame.
6 0 1 1 0 X X X X X X X X X X Read address of last 50-TP
programmed memory location.
7
4
0 1 1 1 X X X X X X X D2 D1 D0 Write contents of serial register
data to control register.
8 1 0 0 0 X X X X X X X X X X Read contents of control register.
9 1 0 0 1 X X X X X X X X X D0 Software shutdown.
D0 = 0; normal mode.
D0 = 1; device placed in shutdown
mode.
1
X is don’t care.
2
AD5271 = don’t care.
3
See Table 15 for 50-TP memory map.
4
See Table 14 for bit details.