Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Table of Contents
- Electrical Characteristics—20 kΩ, 50 kΩ, 200 kΩ Versions
- Timing Characteristics—20 kΩ, 50 kΩ, 200 kΩ Versions
- Absolute Maximum Ratings
- Pin Configuration and Pin Function Descriptions
- Typical Performance Characteristics
- Test Circuits
- SPI-Compatible Digital Interface (DIS = 0)
- I2C-Compatible Digital Interface (DIS = 1)
- Operation
- Programming the Variable Resistor
- Programming the Potentiometer Divider Voltage Output Operation
- Pin-Selectable Digital Interface
- SPI-Compatible 3-Wire Serial Bus (DIS = 0)
- I2C-Compatible 2-Wire Serial Bus (DIS = 1)
- Additional Programmable Logic Output
- Self-Contained Shutdown Function
- Multiple Devices on One Bus
- Level Shift for Negative Voltage Operation
- ESD Protection
- Terminal Voltage Operating Range
- Power-Up Sequence
- VLOGIC Power Supply
- Layout and Power Supply Bypassing
- RDAC Circuit Simulation Model
- Applications Information
- Bipolar DC or AC Operation from Dual Supplies
- Gain Control Compensation
- Programmable Voltage Reference
- 8-Bit Bipolar DAC
- Bipolar Programmable Gain Amplifier
- Programmable Voltage Source with Boosted Output
- Programmable 4 to 20 mA Current Source
- Programmable Bidirectional Current Source
- Programmable Low-Pass Filter
- Programmable Oscillator
- Resistance Scaling
- Resistance Tolerance, Drift, and Temperature Coefficient Mismatch Considerations
- Outline Dimensions
Data Sheet AD5263
Rev. F | Page 13 of 28
TEST CIRCUITS
Figure 29 to Figure 39 define the test conditions used in the Electrical Characteristics—20 KΩ, 50 KΩ, 200 KΩ Versions section and the
Timing Characteristics—20 KΩ, 50 KΩ, 200 KΩ Versions.
03142-028
V
MS
A
W
B
DUT
V+
V+ = V
DD
1LSB = V+/2
N
Figure 29. Test Circuit for Potentiometer Divider Nonlinearity Error (INL, DNL)
03142-029
NO CONNECT
I
W
V
MS
A
W
B
DUT
Figure 30. Test Circuit for Resistor Position Nonlinearity Error
(Rheostat Operation; R-INL, R-DNL)
03142-030
V
MS1
V
MS2
V
W
A
W
B
DUT
R
W
= [V
MS1
– V
MS2
]/I
W
I
W
= V
DD
/R
NOMINAL
Figure 31. Test Circuit for Wiper Resistance
03142-031
ΔV
MS
%
DD
%
PSS (%/%) =
V+ = V
DD
10%
PSRR (dB) = 20 log
MS
DD
V
DD
V
A
V
MS
A
W
B
V+
ΔV
ΔV
ΔV
Figure 32. Test Circuit for Power Supply Sensitivity (PSS, PSRR)
03142-032
OP279
W
5V
B
V
OUT
OFFSET
GND
OFFSET
BIAS
DUT
V
IN
A
Figure 33. Test Circuit for Inverting Gain
03142-033
B
A
V
IN
OP279
W
5V
V
OUT
OFFSET
GND
OFFSET
BIAS
DUT
Figure 34. Test Circuit for Noninverting Gain
03142-034
+15V
–15V
W
A
2.5V
B
V
OUT
OFFSET
GND
DUT
AD8610
V
IN
Figure 35. Test Circuit for Gain vs. Frequency
03142-035
W
B
V
SS
TO V
DD
DUT
I
SW
CODE = 0x00
R
SW
=
0.1V
I
SW
0.1V
Figure 36. Test Circuit for Incremental On Resistance