Datasheet

AD5263
Listing 1. Macro Model Net List for RDAC
RDAC CIRCUIT SIMULATION MODEL
.PARAM D=256, RDAC=20E3
*
.SUBCKT DPOT (A,W,B)
*
CA A 0 25E-12
RWA A W {(1-D/256)*RDAC+60}
CW W 0 55E-12
RWB W B {D/256*RDAC+60}
CB B 0 25E-12
*
.ENDS DPOT
The internal parasitic capacitances and the external capacitive
loads dominate the ac characteristics of the RDACs. Configured
as a potentiometer divider, the –3 dB bandwidth of the AD5263
(20 kΩ resistor) measures 300 kHz at half scale. Figure 21
provides the large signal BODE plot characteristics of the three
available resistor versions: 20 kΩ, 50 kΩ, and 200 kΩ. A parasitic
simulation model is shown in Figure 55. The following code
provides a macro model net list for the 20 kΩ RDAC.
03142-0-069
20k
C
A
W
25pF
RDAC
A
B
C
B
C
W
25pF
55pF
Figure 55. RDAC Circuit Simulation Model for RDAC = 20 k
Rev. 0 | Page 19 of 28